qemu/hw/watchdog
Andrew Jeffery f55d613bc9 watchdog: wdt_aspeed: Add support for the reset width register
The reset width register controls how the pulse on the SoC's WDTRST{1,2}
pins behaves. A pulse is emitted if the external reset bit is set in
WDT_CTRL. On the AST2500 WDT_RESET_WIDTH can consume magic bit patterns
to configure push-pull/open-drain and active-high/active-low
behaviours and thus needs some special handling in the write path.

As some of the capabilities depend on the SoC version a silicon-rev
property is introduced, which is used to guard version-specific
behaviour.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-09-04 15:21:54 +01:00
..
Makefile.objs wdt: Add Aspeed watchdog device model 2017-02-07 18:29:59 +00:00
watchdog.c shutdown: Add source information to SHUTDOWN and RESET 2017-05-23 13:28:17 +02:00
wdt_aspeed.c watchdog: wdt_aspeed: Add support for the reset width register 2017-09-04 15:21:54 +01:00
wdt_diag288.c watchdog/wdt_diag288: Mark diag288 watchdog as non-hotpluggable 2017-08-30 18:23:25 +02:00
wdt_i6300esb.c watchdog: 6300esb: add exit function 2016-12-22 16:00:23 +01:00
wdt_ib700.c Replaced get_tick_per_sec() by NANOSECONDS_PER_SECOND 2016-03-22 22:20:17 +01:00