qemu/target
Richard Henderson 0d0a16c647 target/arm: Add ARM_FEATURE_SVE
Not enabled anywhere so far.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180119045438.28582-11-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-01-25 11:45:29 +00:00
..
alpha tcg: Remove TCGV_UNUSED* and TCGV_IS_UNUSED* 2017-12-29 12:43:39 -08:00
arm target/arm: Add ARM_FEATURE_SVE 2018-01-25 11:45:29 +00:00
cris tcg: Dynamically allocate TCGOps 2017-12-29 12:43:39 -08:00
hppa tcg: Remove TCGV_UNUSED* and TCGV_IS_UNUSED* 2017-12-29 12:43:39 -08:00
i386 i386: Add EPYC-IBPB CPU model 2018-01-17 23:54:39 -02:00
lm32 tcg: Dynamically allocate TCGOps 2017-12-29 12:43:39 -08:00
m68k -----BEGIN PGP SIGNATURE----- 2018-01-08 21:39:44 +00:00
microblaze tcg: Dynamically allocate TCGOps 2017-12-29 12:43:39 -08:00
mips mips: Tweak location of ';' in macros 2018-01-16 14:54:51 +01:00
moxie target/moxie: Fix tlb_fill 2017-12-27 17:20:44 -08:00
nios2 tcg: Remove TCGV_UNUSED* and TCGV_IS_UNUSED* 2017-12-29 12:43:39 -08:00
openrisc target/*helper: don't check retaddr before calling cpu_restore_state 2017-12-27 17:20:44 -08:00
ppc target/ppc: add support for hypervisor doorbells on book3s CPUs 2018-01-20 17:15:05 +11:00
s390x s390x/kvm: provide stfle.81 2018-01-22 11:22:43 +01:00
sh4 tcg: Remove TCGV_UNUSED* and TCGV_IS_UNUSED* 2017-12-29 12:43:39 -08:00
sparc target/sparc: remove MemoryRegionSection check code from sparc_cpu_get_phys_page_debug() 2018-01-09 21:31:31 +00:00
tilegx tcg: Remove TCGV_UNUSED* and TCGV_IS_UNUSED* 2017-12-29 12:43:39 -08:00
tricore target/*helper: don't check retaddr before calling cpu_restore_state 2017-12-27 17:20:44 -08:00
unicore32 tcg: Remove TCGV_UNUSED* and TCGV_IS_UNUSED* 2017-12-29 12:43:39 -08:00
xtensa target/xtensa updates: 2018-01-24 16:59:36 +00:00