qemu/target-ppc
Bharata B Rao 0c967de9c0 target-ppc: Support dump for little endian ppc64
Fix ppc64 arch specific dump code to support all combinations of little/big
endian hosts/guests. FWIW the current code is broken for altivec registers
when guest and host have a different endianness: these 128-bit registers
are written to guest memory as a two 64-bit entities and we should also swap
them.

Unit testing was done with the following program provided by Tom Musta:

#include <stdio.h>
#include <stdint.h>
#include <stdlib.h>

int main(int argc, char** argv)
{

__uint128_t v = ((__uint128_t)0x0001020304050607ull << 64) |
0x08090a0b0c0d0e0full;

register void * vptr asm ("r11");
vptr = &v;

for(;;)
asm volatile ("lvx 30,0,11" );
}

When sending SIGABRT to this program and examining the core file, we get:

- ppc64  : 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f
- ppc64le: 0f 0e 0d 0c 0b 0a 09 08 07 06 05 04 03 02 01 00

We expect to find the very same layout in the QEMU dump since they are
real core files. This is what we get:

- ppc64 host, ppc64 guest   : 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f
- ppc64 host, ppc64le guest : 0f 0e 0d 0c 0b 0a 09 08 07 06 05 04 03 02 01 00
- x86_64 host, ppc64 guest  : 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f
- x86_64 host, ppc64le guest: 0f 0e 0d 0c 0b 0a 09 08 07 06 05 04 03 02 01 00

We introduce a NoteFuncArg type to avoid adding extra arguments to all note
functions.

Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
[ rebased on top of current master branch,
  introduced NoteFuncArg,
  use new cpu_to_dump{16,32,64} endian helpers,
  fix altivec support,
  Greg Kurz <gkurz@linux.vnet.ibm.com> ]
Reviewed-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Greg Kurz <gkurz@linux.vnet.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2014-06-16 13:24:36 +02:00
..
arch_dump.c target-ppc: Support dump for little endian ppc64 2014-06-16 13:24:36 +02:00
cpu-models.c PPC: Make all e500 CPUs SVR aware 2014-06-16 13:24:34 +02:00
cpu-models.h target-ppc: Remove redundant POWER7 declarations 2014-06-16 13:24:27 +02:00
cpu-qom.h spapr: Add support for time base offset migration 2014-06-16 13:24:35 +02:00
cpu.h PPC: Properly emulate L1CSR0 and L1CSR1 2014-06-16 13:24:35 +02:00
dfp_helper.c target-ppc: Introduce DFP Shift Significand 2014-06-16 13:24:32 +02:00
excp_helper.c softmmu: introduce cpu_ldst.h 2014-06-05 16:10:33 +02:00
fpu_helper.c tcg: Invert the inclusion of helper.h 2014-05-28 09:33:54 -07:00
gdbstub.c target-ppc: gdbstub allow byte swapping for reading/writing registers 2014-06-16 13:24:27 +02:00
helper.h target-ppc: Introduce DFP Shift Significand 2014-06-16 13:24:32 +02:00
helper_regs.h PPC: Only enter MSR_POW when no interrupts pending 2014-04-08 11:20:05 +02:00
int_helper.c target-ppc: Refactor AES Instructions 2014-06-16 13:24:33 +02:00
kvm-stub.c kvm/openpic: in-kernel mpic support 2013-07-01 01:11:14 +02:00
kvm.c spapr: Add support for time base offset migration 2014-06-16 13:24:35 +02:00
kvm_ppc.c PPC: KVM: Compile fix for qemu_notify_event 2013-09-02 10:06:42 +02:00
kvm_ppc.h target-ppc: add PowerPCCPU::cpu_dt_id 2014-03-05 03:07:03 +01:00
machine.c target-ppc: Remove PVR check from migration 2014-06-16 13:24:27 +02:00
Makefile.objs target-ppc: Introduce DFP Helper Utilities 2014-06-16 13:24:29 +02:00
mem_helper.c softmmu: introduce cpu_ldst.h 2014-06-05 16:10:33 +02:00
mfrom_table.c
mfrom_table_gen.c
misc_helper.c tcg: Invert the inclusion of helper.h 2014-05-28 09:33:54 -07:00
mmu-hash32.c tcg: Invert the inclusion of helper.h 2014-05-28 09:33:54 -07:00
mmu-hash32.h target-ppc: Use PowerPCCPU in PowerPCCPUClass::handle_mmu_fault hook 2014-03-13 19:20:48 +01:00
mmu-hash64.c tcg: Invert the inclusion of helper.h 2014-05-28 09:33:54 -07:00
mmu-hash64.h target-ppc: Use PowerPCCPU in PowerPCCPUClass::handle_mmu_fault hook 2014-03-13 19:20:48 +01:00
mmu_helper.c softmmu: introduce cpu_ldst.h 2014-06-05 16:10:33 +02:00
STATUS target-ppc: remove powerpc 970gx 2014-03-05 03:06:23 +01:00
timebase_helper.c tcg: Invert the inclusion of helper.h 2014-05-28 09:33:54 -07:00
translate.c PPC: Add dcbtls emulation 2014-06-16 13:24:35 +02:00
translate_init.c PPC: Properly emulate L1CSR0 and L1CSR1 2014-06-16 13:24:35 +02:00
user_only_helper.c cpu: Move exception_index field from CPU_COMMON to CPUState 2014-03-13 19:20:46 +01:00