mirror of
https://gitlab.com/qemu-project/qemu
synced 2024-10-15 07:22:46 +00:00
ea985d235b
These are the last users of the 128K SeaBIOS blob in the i440FX family. Removing them allows us to drop PCI support from the 128K blob, thus making it easier to update SeaBIOS to newer versions. Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
384 lines
14 KiB
C
384 lines
14 KiB
C
#include "qemu/osdep.h"
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#include "qapi/qmp/qdict.h"
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#include "qapi/qmp/qlist.h"
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#include "qapi/qmp/qnum.h"
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#include "qapi/qmp/qbool.h"
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#include "libqtest-single.h"
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static char *get_cpu0_qom_path(void)
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{
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QDict *resp;
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QList *ret;
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QDict *cpu0;
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char *path;
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resp = qmp("{'execute': 'query-cpus-fast', 'arguments': {}}");
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g_assert(qdict_haskey(resp, "return"));
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ret = qdict_get_qlist(resp, "return");
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cpu0 = qobject_to(QDict, qlist_peek(ret));
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path = g_strdup(qdict_get_str(cpu0, "qom-path"));
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qobject_unref(resp);
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return path;
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}
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static QObject *qom_get(const char *path, const char *prop)
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{
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QDict *resp = qmp("{ 'execute': 'qom-get',"
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" 'arguments': { 'path': %s,"
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" 'property': %s } }",
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path, prop);
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QObject *ret = qdict_get(resp, "return");
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qobject_ref(ret);
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qobject_unref(resp);
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return ret;
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}
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static bool qom_get_bool(const char *path, const char *prop)
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{
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QBool *value = qobject_to(QBool, qom_get(path, prop));
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bool b = qbool_get_bool(value);
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qobject_unref(value);
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return b;
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}
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typedef struct CpuidTestArgs {
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const char *cmdline;
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const char *property;
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int64_t expected_value;
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} CpuidTestArgs;
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static void test_cpuid_prop(const void *data)
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{
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const CpuidTestArgs *args = data;
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char *path;
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QNum *value;
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int64_t val;
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qtest_start(args->cmdline);
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path = get_cpu0_qom_path();
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value = qobject_to(QNum, qom_get(path, args->property));
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g_assert(qnum_get_try_int(value, &val));
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g_assert_cmpint(val, ==, args->expected_value);
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qtest_end();
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qobject_unref(value);
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g_free(path);
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}
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static void add_cpuid_test(const char *name, const char *cmdline,
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const char *property, int64_t expected_value)
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{
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CpuidTestArgs *args = g_new0(CpuidTestArgs, 1);
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args->cmdline = cmdline;
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args->property = property;
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args->expected_value = expected_value;
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qtest_add_data_func(name, args, test_cpuid_prop);
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}
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/* Parameters to a add_feature_test() test case */
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typedef struct FeatureTestArgs {
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/* cmdline to start QEMU */
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const char *cmdline;
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/*
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* cpuid-input-eax and cpuid-input-ecx values to look for,
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* in "feature-words" and "filtered-features" properties.
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*/
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uint32_t in_eax, in_ecx;
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/* The register name to look for, in the X86CPUFeatureWordInfo array */
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const char *reg;
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/* The bit to check in X86CPUFeatureWordInfo.features */
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int bitnr;
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/* The expected value for the bit in (X86CPUFeatureWordInfo.features) */
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bool expected_value;
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} FeatureTestArgs;
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/* Get the value for a feature word in a X86CPUFeatureWordInfo list */
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static uint32_t get_feature_word(QList *features, uint32_t eax, uint32_t ecx,
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const char *reg)
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{
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const QListEntry *e;
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for (e = qlist_first(features); e; e = qlist_next(e)) {
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QDict *w = qobject_to(QDict, qlist_entry_obj(e));
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const char *rreg = qdict_get_str(w, "cpuid-register");
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uint32_t reax = qdict_get_int(w, "cpuid-input-eax");
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bool has_ecx = qdict_haskey(w, "cpuid-input-ecx");
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uint32_t recx = 0;
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int64_t val;
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if (has_ecx) {
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recx = qdict_get_int(w, "cpuid-input-ecx");
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}
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if (eax == reax && (!has_ecx || ecx == recx) && !strcmp(rreg, reg)) {
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g_assert(qnum_get_try_int(qobject_to(QNum,
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qdict_get(w, "features")),
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&val));
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return val;
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}
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}
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return 0;
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}
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static void test_feature_flag(const void *data)
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{
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const FeatureTestArgs *args = data;
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char *path;
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QList *present, *filtered;
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uint32_t value;
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qtest_start(args->cmdline);
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path = get_cpu0_qom_path();
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present = qobject_to(QList, qom_get(path, "feature-words"));
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filtered = qobject_to(QList, qom_get(path, "filtered-features"));
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value = get_feature_word(present, args->in_eax, args->in_ecx, args->reg);
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value |= get_feature_word(filtered, args->in_eax, args->in_ecx, args->reg);
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qtest_end();
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g_assert(!!(value & (1U << args->bitnr)) == args->expected_value);
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qobject_unref(present);
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qobject_unref(filtered);
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g_free(path);
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}
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/*
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* Add test case to ensure that a given feature flag is set in
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* either "feature-words" or "filtered-features", when running QEMU
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* using cmdline
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*/
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static FeatureTestArgs *add_feature_test(const char *name, const char *cmdline,
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uint32_t eax, uint32_t ecx,
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const char *reg, int bitnr,
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bool expected_value)
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{
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FeatureTestArgs *args = g_new0(FeatureTestArgs, 1);
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args->cmdline = cmdline;
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args->in_eax = eax;
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args->in_ecx = ecx;
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args->reg = reg;
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args->bitnr = bitnr;
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args->expected_value = expected_value;
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qtest_add_data_func(name, args, test_feature_flag);
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return args;
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}
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static void test_plus_minus_subprocess(void)
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{
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char *path;
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/* Rules:
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* 1)"-foo" overrides "+foo"
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* 2) "[+-]foo" overrides "foo=..."
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* 3) Old feature names with underscores (e.g. "sse4_2")
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* should keep working
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*
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* Note: rules 1 and 2 are planned to be removed soon, and
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* should generate a warning.
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*/
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qtest_start("-cpu pentium,-fpu,+fpu,-mce,mce=on,+cx8,cx8=off,+sse4_1,sse4_2=on");
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path = get_cpu0_qom_path();
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g_assert_false(qom_get_bool(path, "fpu"));
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g_assert_false(qom_get_bool(path, "mce"));
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g_assert_true(qom_get_bool(path, "cx8"));
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/* Test both the original and the alias feature names: */
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g_assert_true(qom_get_bool(path, "sse4-1"));
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g_assert_true(qom_get_bool(path, "sse4.1"));
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g_assert_true(qom_get_bool(path, "sse4-2"));
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g_assert_true(qom_get_bool(path, "sse4.2"));
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qtest_end();
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g_free(path);
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}
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static void test_plus_minus(void)
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{
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g_test_trap_subprocess("/x86/cpuid/parsing-plus-minus/subprocess", 0, 0);
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g_test_trap_assert_passed();
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g_test_trap_assert_stderr("*Ambiguous CPU model string. "
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"Don't mix both \"-mce\" and \"mce=on\"*");
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g_test_trap_assert_stderr("*Ambiguous CPU model string. "
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"Don't mix both \"+cx8\" and \"cx8=off\"*");
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g_test_trap_assert_stdout("");
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}
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int main(int argc, char **argv)
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{
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g_test_init(&argc, &argv, NULL);
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g_test_add_func("/x86/cpuid/parsing-plus-minus/subprocess",
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test_plus_minus_subprocess);
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g_test_add_func("/x86/cpuid/parsing-plus-minus", test_plus_minus);
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/* Original level values for CPU models: */
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add_cpuid_test("x86/cpuid/phenom/level",
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"-cpu phenom", "level", 5);
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add_cpuid_test("x86/cpuid/Conroe/level",
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"-cpu Conroe", "level", 10);
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add_cpuid_test("x86/cpuid/SandyBridge/level",
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"-cpu SandyBridge", "level", 0xd);
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add_cpuid_test("x86/cpuid/486/xlevel",
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"-cpu 486", "xlevel", 0);
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add_cpuid_test("x86/cpuid/core2duo/xlevel",
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"-cpu core2duo", "xlevel", 0x80000008);
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add_cpuid_test("x86/cpuid/phenom/xlevel",
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"-cpu phenom", "xlevel", 0x8000001A);
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add_cpuid_test("x86/cpuid/athlon/xlevel",
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"-cpu athlon", "xlevel", 0x80000008);
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/* If level is not large enough, it should increase automatically: */
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/* CPUID[6].EAX: */
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add_cpuid_test("x86/cpuid/auto-level/phenom/arat",
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"-cpu 486,arat=on", "level", 6);
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/* CPUID[EAX=7,ECX=0].EBX: */
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add_cpuid_test("x86/cpuid/auto-level/phenom/fsgsbase",
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"-cpu phenom,fsgsbase=on", "level", 7);
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/* CPUID[EAX=7,ECX=0].ECX: */
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add_cpuid_test("x86/cpuid/auto-level/phenom/avx512vbmi",
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"-cpu phenom,avx512vbmi=on", "level", 7);
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/* CPUID[EAX=0xd,ECX=1].EAX: */
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add_cpuid_test("x86/cpuid/auto-level/phenom/xsaveopt",
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"-cpu phenom,xsaveopt=on", "level", 0xd);
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/* CPUID[8000_0001].EDX: */
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add_cpuid_test("x86/cpuid/auto-xlevel/486/3dnow",
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"-cpu 486,3dnow=on", "xlevel", 0x80000001);
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/* CPUID[8000_0001].ECX: */
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add_cpuid_test("x86/cpuid/auto-xlevel/486/sse4a",
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"-cpu 486,sse4a=on", "xlevel", 0x80000001);
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/* CPUID[8000_0007].EDX: */
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add_cpuid_test("x86/cpuid/auto-xlevel/486/invtsc",
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"-cpu 486,invtsc=on", "xlevel", 0x80000007);
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/* CPUID[8000_000A].EDX: */
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add_cpuid_test("x86/cpuid/auto-xlevel/486/npt",
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"-cpu 486,svm=on,npt=on", "xlevel", 0x8000000A);
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/* CPUID[C000_0001].EDX: */
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add_cpuid_test("x86/cpuid/auto-xlevel2/phenom/xstore",
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"-cpu phenom,xstore=on", "xlevel2", 0xC0000001);
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/* SVM needs CPUID[0x8000000A] */
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add_cpuid_test("x86/cpuid/auto-xlevel/athlon/svm",
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"-cpu athlon,svm=on", "xlevel", 0x8000000A);
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/* If level is already large enough, it shouldn't change: */
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add_cpuid_test("x86/cpuid/auto-level/SandyBridge/multiple",
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"-cpu SandyBridge,arat=on,fsgsbase=on,avx512vbmi=on",
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"level", 0xd);
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/* If level is explicitly set, it shouldn't change: */
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add_cpuid_test("x86/cpuid/auto-level/486/fixed/0xF",
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"-cpu 486,level=0xF,arat=on,fsgsbase=on,avx512vbmi=on,xsaveopt=on",
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"level", 0xF);
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add_cpuid_test("x86/cpuid/auto-level/486/fixed/2",
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"-cpu 486,level=2,arat=on,fsgsbase=on,avx512vbmi=on,xsaveopt=on",
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"level", 2);
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add_cpuid_test("x86/cpuid/auto-level/486/fixed/0",
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"-cpu 486,level=0,arat=on,fsgsbase=on,avx512vbmi=on,xsaveopt=on",
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"level", 0);
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/* if xlevel is already large enough, it shouldn't change: */
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add_cpuid_test("x86/cpuid/auto-xlevel/phenom/3dnow",
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"-cpu phenom,3dnow=on,sse4a=on,invtsc=on,npt=on,svm=on",
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"xlevel", 0x8000001A);
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/* If xlevel is explicitly set, it shouldn't change: */
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add_cpuid_test("x86/cpuid/auto-xlevel/486/fixed/80000002",
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"-cpu 486,xlevel=0x80000002,3dnow=on,sse4a=on,invtsc=on,npt=on,svm=on",
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"xlevel", 0x80000002);
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add_cpuid_test("x86/cpuid/auto-xlevel/486/fixed/8000001A",
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"-cpu 486,xlevel=0x8000001A,3dnow=on,sse4a=on,invtsc=on,npt=on,svm=on",
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"xlevel", 0x8000001A);
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add_cpuid_test("x86/cpuid/auto-xlevel/phenom/fixed/0",
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"-cpu 486,xlevel=0,3dnow=on,sse4a=on,invtsc=on,npt=on,svm=on",
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"xlevel", 0);
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/* if xlevel2 is already large enough, it shouldn't change: */
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add_cpuid_test("x86/cpuid/auto-xlevel2/486/fixed",
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"-cpu 486,xlevel2=0xC0000002,xstore=on",
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"xlevel2", 0xC0000002);
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/* Check compatibility of old machine-types that didn't
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* auto-increase level/xlevel/xlevel2: */
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if (qtest_has_machine("pc-i440fx-2.7")) {
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add_cpuid_test("x86/cpuid/auto-level/pc-2.7",
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"-machine pc-i440fx-2.7 -cpu 486,arat=on,avx512vbmi=on,xsaveopt=on",
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"level", 1);
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add_cpuid_test("x86/cpuid/auto-xlevel/pc-2.7",
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"-machine pc-i440fx-2.7 -cpu 486,3dnow=on,sse4a=on,invtsc=on,npt=on,svm=on",
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"xlevel", 0);
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add_cpuid_test("x86/cpuid/auto-xlevel2/pc-2.7",
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"-machine pc-i440fx-2.7 -cpu 486,xstore=on",
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"xlevel2", 0);
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}
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/*
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* QEMU 2.3.0 had auto-level enabled for CPUID[7], already,
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* and the compat code that sets default level shouldn't
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* disable the auto-level=7 code:
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*/
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if (qtest_has_machine("pc-i440fx-2.3")) {
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add_cpuid_test("x86/cpuid/auto-level7/pc-i440fx-2.3/off",
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"-machine pc-i440fx-2.3 -cpu Penryn",
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"level", 4);
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add_cpuid_test("x86/cpuid/auto-level7/pc-i440fx-2.3/on",
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"-machine pc-i440fx-2.3 -cpu Penryn,erms=on",
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"level", 7);
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}
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if (qtest_has_machine("pc-i440fx-2.9")) {
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add_cpuid_test("x86/cpuid/auto-level7/pc-i440fx-2.9/off",
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"-machine pc-i440fx-2.9 -cpu Conroe",
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"level", 10);
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add_cpuid_test("x86/cpuid/auto-level7/pc-i440fx-2.9/on",
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"-machine pc-i440fx-2.9 -cpu Conroe,erms=on",
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"level", 10);
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}
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/*
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* xlevel doesn't have any feature that triggers auto-level
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* code on old machine-types. Just check that the compat code
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* is working correctly:
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*/
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if (qtest_has_machine("pc-i440fx-2.3")) {
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add_cpuid_test("x86/cpuid/xlevel-compat/pc-i440fx-2.3",
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"-machine pc-i440fx-2.3 -cpu SandyBridge",
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"xlevel", 0x8000000a);
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}
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if (qtest_has_machine("pc-i440fx-2.4")) {
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add_cpuid_test("x86/cpuid/xlevel-compat/pc-i440fx-2.4/npt-off",
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"-machine pc-i440fx-2.4 -cpu SandyBridge,",
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"xlevel", 0x80000008);
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add_cpuid_test("x86/cpuid/xlevel-compat/pc-i440fx-2.4/npt-on",
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"-machine pc-i440fx-2.4 -cpu SandyBridge,svm=on,npt=on",
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"xlevel", 0x80000008);
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}
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/* Test feature parsing */
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add_feature_test("x86/cpuid/features/plus",
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"-cpu 486,+arat",
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6, 0, "EAX", 2, true);
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add_feature_test("x86/cpuid/features/minus",
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"-cpu pentium,-mmx",
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1, 0, "EDX", 23, false);
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add_feature_test("x86/cpuid/features/on",
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"-cpu 486,arat=on",
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6, 0, "EAX", 2, true);
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add_feature_test("x86/cpuid/features/off",
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"-cpu pentium,mmx=off",
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1, 0, "EDX", 23, false);
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add_feature_test("x86/cpuid/features/max-plus-invtsc",
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"-cpu max,+invtsc",
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0x80000007, 0, "EDX", 8, true);
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add_feature_test("x86/cpuid/features/max-invtsc-on",
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"-cpu max,invtsc=on",
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0x80000007, 0, "EDX", 8, true);
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add_feature_test("x86/cpuid/features/max-minus-mmx",
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"-cpu max,-mmx",
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1, 0, "EDX", 23, false);
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add_feature_test("x86/cpuid/features/max-invtsc-on,mmx=off",
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"-cpu max,mmx=off",
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1, 0, "EDX", 23, false);
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return g_test_run();
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}
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