mirror of
https://gitlab.com/qemu-project/qemu
synced 2024-09-30 00:04:37 +00:00
40a6b8935d
The bit positions of both registers are related. Tracing the registers independently results in the same offsets across these registers which eases debugging. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Acked-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230908084234.17642-9-shentey@gmail.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
90 lines
5.9 KiB
Plaintext
90 lines
5.9 KiB
Plaintext
# See docs/devel/tracing.rst for syntax documentation.
|
|
|
|
# memory_hotplug.c
|
|
mhp_acpi_invalid_slot_selected(uint32_t slot) "0x%"PRIx32
|
|
mhp_acpi_ejecting_invalid_slot(uint32_t slot) "0x%"PRIx32
|
|
mhp_acpi_read_addr_lo(uint32_t slot, uint32_t addr) "slot[0x%"PRIx32"] addr lo: 0x%"PRIx32
|
|
mhp_acpi_read_addr_hi(uint32_t slot, uint32_t addr) "slot[0x%"PRIx32"] addr hi: 0x%"PRIx32
|
|
mhp_acpi_read_size_lo(uint32_t slot, uint32_t size) "slot[0x%"PRIx32"] size lo: 0x%"PRIx32
|
|
mhp_acpi_read_size_hi(uint32_t slot, uint32_t size) "slot[0x%"PRIx32"] size hi: 0x%"PRIx32
|
|
mhp_acpi_read_pxm(uint32_t slot, uint32_t pxm) "slot[0x%"PRIx32"] proximity: 0x%"PRIx32
|
|
mhp_acpi_read_flags(uint32_t slot, uint32_t flags) "slot[0x%"PRIx32"] flags: 0x%"PRIx32
|
|
mhp_acpi_write_slot(uint32_t slot) "set active slot: 0x%"PRIx32
|
|
mhp_acpi_write_ost_ev(uint32_t slot, uint32_t ev) "slot[0x%"PRIx32"] OST EVENT: 0x%"PRIx32
|
|
mhp_acpi_write_ost_status(uint32_t slot, uint32_t st) "slot[0x%"PRIx32"] OST STATUS: 0x%"PRIx32
|
|
mhp_acpi_clear_insert_evt(uint32_t slot) "slot[0x%"PRIx32"] clear insert event"
|
|
mhp_acpi_clear_remove_evt(uint32_t slot) "slot[0x%"PRIx32"] clear remove event"
|
|
mhp_acpi_pc_dimm_deleted(uint32_t slot) "slot[0x%"PRIx32"] pc-dimm deleted"
|
|
mhp_acpi_pc_dimm_delete_failed(uint32_t slot) "slot[0x%"PRIx32"] pc-dimm delete failed"
|
|
|
|
# core.c
|
|
acpi_gpe_en_ioport_readb(uint32_t addr, uint8_t val) "addr: 0x%" PRIx32 " ==> 0x%02" PRIx8
|
|
acpi_gpe_en_ioport_writeb(uint32_t addr, uint8_t val) "addr: 0x%" PRIx32 " <== 0x%02" PRIx8
|
|
acpi_gpe_sts_ioport_readb(uint32_t addr, uint8_t val) "addr: 0x%" PRIx32 " ==> 0x%02" PRIx8
|
|
acpi_gpe_sts_ioport_writeb(uint32_t addr, uint8_t val) "addr: 0x%" PRIx32 " <== 0x%02" PRIx8
|
|
|
|
# cpu.c
|
|
cpuhp_acpi_invalid_idx_selected(uint32_t idx) "0x%"PRIx32
|
|
cpuhp_acpi_read_flags(uint32_t idx, uint8_t flags) "idx[0x%"PRIx32"] flags: 0x%"PRIx8
|
|
cpuhp_acpi_write_idx(uint32_t idx) "set active cpu idx: 0x%"PRIx32
|
|
cpuhp_acpi_write_cmd(uint32_t idx, uint8_t cmd) "idx[0x%"PRIx32"] cmd: 0x%"PRIx8
|
|
cpuhp_acpi_read_cmd_data(uint32_t idx, uint32_t data) "idx[0x%"PRIx32"] data: 0x%"PRIx32
|
|
cpuhp_acpi_read_cmd_data2(uint32_t idx, uint32_t data) "idx[0x%"PRIx32"] data: 0x%"PRIx32
|
|
cpuhp_acpi_cpu_has_events(uint32_t idx, bool ins, bool rm) "idx[0x%"PRIx32"] inserting: %d, removing: %d"
|
|
cpuhp_acpi_clear_inserting_evt(uint32_t idx) "idx[0x%"PRIx32"]"
|
|
cpuhp_acpi_clear_remove_evt(uint32_t idx) "idx[0x%"PRIx32"]"
|
|
cpuhp_acpi_ejecting_invalid_cpu(uint32_t idx) "0x%"PRIx32
|
|
cpuhp_acpi_ejecting_cpu(uint32_t idx) "0x%"PRIx32
|
|
cpuhp_acpi_fw_remove_invalid_cpu(uint32_t idx) "0x%"PRIx32
|
|
cpuhp_acpi_fw_remove_cpu(uint32_t idx) "0x%"PRIx32
|
|
cpuhp_acpi_write_ost_ev(uint32_t slot, uint32_t ev) "idx[0x%"PRIx32"] OST EVENT: 0x%"PRIx32
|
|
cpuhp_acpi_write_ost_status(uint32_t slot, uint32_t st) "idx[0x%"PRIx32"] OST STATUS: 0x%"PRIx32
|
|
|
|
# pcihp.c
|
|
acpi_pci_eject_slot(unsigned bsel, unsigned slot) "bsel: %u slot: %u"
|
|
acpi_pci_unplug(int bsel, int slot) "bsel: %d slot: %d"
|
|
acpi_pci_unplug_request(int bsel, int slot) "bsel: %d slot: %d"
|
|
acpi_pci_up_read(uint32_t val) "%" PRIu32
|
|
acpi_pci_down_read(uint32_t val) "%" PRIu32
|
|
acpi_pci_features_read(uint32_t val) "%" PRIu32
|
|
acpi_pci_acpi_index_read(uint32_t val) "%" PRIu32
|
|
acpi_pci_acpi_index_write(unsigned bsel, unsigned slot, uint32_t aidx) "bsel: %u slot: %u aidx: %" PRIu32
|
|
acpi_pci_rmv_read(uint32_t val) "%" PRIu32
|
|
acpi_pci_sel_read(uint32_t val) "%" PRIu32
|
|
acpi_pci_ej_write(uint64_t addr, uint64_t data) "0x%" PRIx64 " <== %" PRIu64
|
|
acpi_pci_sel_write(uint64_t addr, uint64_t data) "0x%" PRIx64 " <== %" PRIu64
|
|
|
|
# tco.c
|
|
tco_timer_reload(int ticks, int msec) "ticks=%d (%d ms)"
|
|
tco_timer_expired(int timeouts_no, bool strap, bool no_reboot) "timeouts_no=%d no_reboot=%d/%d"
|
|
tco_io_write(uint64_t addr, uint32_t val) "addr=0x%" PRIx64 " val=0x%" PRIx32
|
|
tco_io_read(uint64_t addr, uint32_t val) "addr=0x%" PRIx64 " val=0x%" PRIx32
|
|
|
|
# erst.c
|
|
acpi_erst_reg_write(uint64_t addr, uint64_t val, unsigned size) "addr: 0x%04" PRIx64 " <== 0x%016" PRIx64 " (size: %u)"
|
|
acpi_erst_reg_read(uint64_t addr, uint64_t val, unsigned size) " addr: 0x%04" PRIx64 " ==> 0x%016" PRIx64 " (size: %u)"
|
|
acpi_erst_mem_write(uint64_t addr, uint64_t val, unsigned size) "addr: 0x%06" PRIx64 " <== 0x%016" PRIx64 " (size: %u)"
|
|
acpi_erst_mem_read(uint64_t addr, uint64_t val, unsigned size) " addr: 0x%06" PRIx64 " ==> 0x%016" PRIx64 " (size: %u)"
|
|
acpi_erst_pci_bar_0(uint64_t addr) "BAR0: 0x%016" PRIx64
|
|
acpi_erst_pci_bar_1(uint64_t addr) "BAR1: 0x%016" PRIx64
|
|
acpi_erst_realizefn_in(void)
|
|
acpi_erst_realizefn_out(unsigned size) "total nvram size %u bytes"
|
|
acpi_erst_reset_in(unsigned record_count) "record_count %u"
|
|
acpi_erst_reset_out(unsigned record_count) "record_count %u"
|
|
acpi_erst_post_load(void *header, unsigned slot_size) "header: 0x%p slot_size %u"
|
|
acpi_erst_class_init_in(void)
|
|
acpi_erst_class_init_out(void)
|
|
|
|
# nvdimm.c
|
|
acpi_nvdimm_read_fit(uint32_t offset, uint32_t len, const char *dirty) "Read FIT: offset 0x%" PRIx32 " FIT size 0x%" PRIx32 " Dirty %s"
|
|
acpi_nvdimm_label_info(uint32_t label_size, uint32_t mxfer) "label_size 0x%" PRIx32 ", max_xfer 0x%" PRIx32
|
|
acpi_nvdimm_label_overflow(uint32_t offset, uint32_t length) "offset 0x%" PRIx32 " + length 0x%" PRIx32 " is overflow"
|
|
acpi_nvdimm_label_oversize(uint32_t pos, uint64_t size) "position 0x%" PRIx32 " is beyond label data (len = %" PRIu64 ")"
|
|
acpi_nvdimm_label_xfer_exceed(uint32_t length, uint32_t max_xfer) "length (0x%" PRIx32 ") is larger than max_xfer (0x%" PRIx32 ")"
|
|
acpi_nvdimm_read_label(uint32_t offset, uint32_t length) "Read Label Data: offset 0x%" PRIx32 " length 0x%" PRIx32
|
|
acpi_nvdimm_write_label(uint32_t offset, uint32_t length) "Write Label Data: offset 0x%" PRIx32 " length 0x%" PRIx32
|
|
acpi_nvdimm_read_io_port(void) "Alert: we never read _DSM IO Port"
|
|
acpi_nvdimm_dsm_mem_addr(uint64_t dsm_mem_addr) "dsm memory address 0x%" PRIx64
|
|
acpi_nvdimm_dsm_info(uint32_t revision, uint32_t handle, uint32_t function) "Revision 0x%" PRIx32 " Handle 0x%" PRIx32 " Function 0x%" PRIx32
|
|
acpi_nvdimm_invalid_revision(uint32_t revision) "Revision 0x%" PRIx32 " is not supported, expect 0x1"
|