Commit graph

80 commits

Author SHA1 Message Date
Aurelien Jarno
88770fec6c disas: Disassemble all ppc insns for the guest
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-04-26 23:02:42 +02:00
Richard Henderson
66d4f6a32b disas: Disassemble all ppc insns for the host
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-04-15 19:44:35 +02:00
Anthony Green
bd86a88eed Add moxie disassembler
Signed-off-by: Anthony Green <green@moxielogic.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-03-23 14:25:41 +00:00
Paolo Bonzini
83c9089e73 monitor: move include files to include/monitor/
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-12-19 08:31:32 +01:00
Paolo Bonzini
76cad71136 build: kill libdis, move disassemblers to disas/
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-12-19 08:29:06 +01:00
Blue Swirl
f4359b9ffe disas: avoid using cpu_single_env
Pass around CPUArchState instead of using global cpu_single_env.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Acked-by: Richard Henderson <rth@twiddle.net>
Acked-by: Aurelien Jarno <aurelien@aurel32.net>
Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn>
2012-11-10 13:49:20 +00:00
Richard Henderson
9b9c37c364 tcg-sparc: Assume v9 cpu always, i.e. force v8plus in 32-bit mode.
Current code doesn't actually work in 32-bit mode at all.  Since
no one really noticed, drop the complication of v7 and v8 cpus.
Eliminate the --sparc_cpu configure option and standardize macro
testing on TCG_TARGET_REG_BITS / HOST_LONG_BITS

Signed-off-by: Richard Henderson <rth@twiddle.net>
2012-09-21 22:02:16 +02:00
Peter Maydell
636bd28939 disas: Fix printing of addresses in disassembly
In our disassembly code, the bfd_vma type is always 64 bits,
even if the target's virtual address width is only 32 bits. This
means that when we print out addresses we need to truncate them
to 32 bits, to avoid odd output which has incorrectly sign-extended
a value to 64 bits, for instance this ARM example:
    0x80479a60:  e59f4088     ldr  r4, [pc, #136]  ; 0xffffffff80479a4f

(It would also be possible to truncate before passing the address
to info->print_address_func(), but truncating in the final print
function is the same approach that binutils takes to this problem.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-07-14 10:32:34 +00:00
Jim Meyering
a31f053129 fix some common typos
These were identified using: http://github.com/lyda/misspell-check
and run like this to create a bourne shell script using GNU sed's
-i option:

git ls-files|grep -vF .bin | misspellings -f - |grep -v '^ERROR:' |perl \
-pe 's/^(.*?)\[(\d+)\]: (\w+) -> "(.*?)"$/sed -i '\''${2}s!$3!$4!'\'' $1/'

Manually eliding the FP, "rela->real" and resolving "addres" to
address (not "adders") we get this:

  sed -i '450s!thru!through!' Changelog
  sed -i '260s!neccessary!necessary!' coroutine-sigaltstack.c
  sed -i '54s!miniscule!minuscule!' disas.c
  sed -i '1094s!thru!through!' hw/usb/hcd-ehci.c
  sed -i '1095s!thru!through!' hw/usb/hcd-ehci.c
  sed -i '21s!unecessary!unnecessary!' qapi-schema-guest.json
  sed -i '307s!explictly!explicitly!' qemu-ga.c
  sed -i '490s!preceeding!preceding!' qga/commands-posix.c
  sed -i '792s!addres!address!' qga/commands-posix.c
  sed -i '6s!beeing!being!' tests/tcg/test-mmap.c

Also, manually fix "arithmentic", spotted by Peter Maydell:

  sed -i 's!arithmentic!arithmetic!' coroutine-sigaltstack.c

Signed-off-by: Jim Meyering <meyering@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2012-05-14 07:27:24 +02:00
Stefan Weil
b0b0f1c964 disas: Replace 'unsigned long' by 'uintptr_t'
This is needed for w64. It changes nothing for other hosts.

Signed-off-by: Stefan Weil <sw@weilnetz.de>
2012-04-15 21:25:18 +02:00
Paul Brook
d8fd295499 Userspace ARM BE8 support
Add support for ARM BE8 userspace binaries.
i.e. big-endian data and little-endian code.
In principle LE8 mode is also possible, but AFAIK has never actually
been implemented/used.

System emulation doesn't have any useable big-endian board models,
but should in principle work once you fix that.
Dynamic endianness switching requires messing with data accesses,
preferably with TCG cooperation, and is orthogonal to BE8 support.

Signed-off-by: Paul Brook <paul@codesourcery.com>
[PMM: various changes, mostly as per my suggestions in code review:
 * rebase
 * use EF_ defines rather than hardcoded constants
 * make bswap_code a bool for future VMSTATE macro compatibility
 * update comment in cpu.h about TB flags bit field usage
 * factor out load-code-and-swap into arm_ld*_code functions and
   get_user_code* macros
 * fix stray trailing space at end of line
 * added braces in disas.c to satisfy checkpatch
]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2012-04-06 19:25:57 +03:00
Michael Walle
79368f4984 target-lm32: add simple disassembler
Because binutils disassembler is based on libopcode, this is a rewrite from
scratch.

Signed-off-by: Michael Walle <michael@walle.cc>
2012-04-01 20:30:23 +02:00
Andreas Färber
9349b4f9fd Rename CPUState -> CPUArchState
Scripted conversion:
  for file in *.[hc] hw/*.[hc] hw/kvm/*.[hc] linux-user/*.[hc] linux-user/m68k/*.[hc] bsd-user/*.[hc] darwin-user/*.[hc] tcg/*/*.[hc] target-*/cpu.h; do
    sed -i "s/CPUState/CPUArchState/g" $file
  done

All occurrences of CPUArchState are expected to be replaced by QOM CPUState,
once all targets are QOM'ified and common fields have been extracted.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-14 22:20:27 +01:00
Stefan Weil
5826e51917 tcg: Add tci disassembler
Signed-off-by: Stefan Weil <sw@weilnetz.de>
2011-10-31 21:52:17 +01:00
Frediano Ziglio
e99722f66a disasm: update comment
Signed-off-by: Frediano Ziglio <freddy77@gmail.com>
Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-08-25 09:21:48 +01:00
Blue Swirl
2b41f10e18 Remove exec-all.h include directives
Most exec-all.h include directives are now useless, remove them.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26 18:25:35 +00:00
Richard Henderson
b9bec751c8 target-alpha: Disassemble EV6 PALcode instructions.
The QEMU emulation PALcode will use EV6 PALcode insns regardless
of the "real" cpu instruction set being emulated.

Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-05-31 10:18:04 -07:00
Stefan Weil
54f7b4a396 Replace cpu_physical_memory_rw were possible
Using cpu_physical_memory_read, cpu_physical_memory_write and ldub_phys
improves readability and allows removing some type casts.

lduw_phys and ldl_phys were not used because both require aligned
addresses. Therefore it is not possible to simply replace existing
calls by one of these functions.

Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-12 21:51:50 +02:00
Ulrich Hecht
db50060984 s390x: Enable disassembler for s390x
This patch enables the instruction disassembler when using an
S390x target.

Signed-off-by: Ulrich Hecht <uli@suse.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-04 00:34:11 +02:00
Aurelien Jarno
0f136d9e06 disas: remove opcode printing on ARM hosts
Following commit 5d48e9174e, it's possible
to remove the hack that used to display the opcodes on ARM hosts only.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-12 15:12:58 +01:00
Edgar E. Iglesias
b09cd072df cris: Support disassembly of crisv10
Signed-off-by: Edgar E. Iglesias <edgar@axis.com>
2011-01-10 22:31:09 +01:00
Stefan Weil
8b7968f7c4 Use GCC_FMT_ATTR (format checking)
Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-10-03 06:34:51 +00:00
Aurelien Jarno
903ec55cc0 ia64 disas support
Taken from binutils SVN, using last GPLv2 version.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-01 21:51:59 +02:00
Magnus Damm
b4e1f07747 sh4 disasm fixes
Add the sh4 target to the monitor disassembly function,
and remove a duplicate "0x" printout from the sh4 dis-
assembly code.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-11-14 01:19:12 +01:00
Juan Quintela
e2542fe2bc rename WORDS_BIGENDIAN to HOST_WORDS_BIGENDIAN
Signed-off-by: Juan Quintela <quintela@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-27 14:09:21 -05:00
Edgar E. Iglesias
e90e390c2b microblaze: Add disassembler.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2009-05-26 21:10:28 +02:00
Blue Swirl
e612a1f725 Fix disassembler memory accesses
Sparc disassembler wants to check previous addresses for some stuff
and this may actually cause faults to be generated to the guest if the
address is close to page start, because of the function used for the
memory access.

Fix by changing ldub_code to cpu_memory_rw_debug, which doesn't trigger
exceptions.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-07 17:14:07 +00:00
malc
754d00ae3a Safety net for the cases where disassembler/translator disagree over instruction decoding
Noticed by Mark Karpeles.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7209 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-21 22:26:22 +00:00
aliguori
376253ece4 monitor: Rework API (Jan Kiszka)
Refactor the monitor API and prepare it for decoupled terminals:
term_print functions are renamed to monitor_* and all monitor services
gain a new parameter (mon) that will once refer to the monitor instance
the output is supposed to appear on. However, the argument remains
unused for now. All monitor command callbacks are also extended by a mon
parameter so that command handlers are able to pass an appropriate
reference to monitor output services.

For the case that monitor outputs so far happen without clearly
identifiable context, the global variable cur_mon is introduced that
shall once provide a pointer either to the current active monitor (while
processing commands) or to the default one. On the mid or long term,
those use case will be obsoleted so that this variable can be removed
again.

Due to the broad usage of the monitor interface, this patch mostly deals
with converting users of the monitor API. A few of them are already
extended to pass 'mon' from the command handler further down to internal
functions that invoke monitor_printf.

At this chance, monitor-related prototypes are moved from console.h to
a new monitor.h. The same is done for the readline API.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6711 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-05 23:01:23 +00:00
blueswir1
7e000c2e3d Allow disassembling last addresses of the address space
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6619 c046a42c-6fe2-441c-8c8c-71466251a162
2009-02-13 21:44:41 +00:00
malc
e58ffeb322 Remove all traces of __powerpc__
According to $GCC/gcc/config/rs6000/rs6000-c.c _ARCH_PPC is the
ubiquitous define which should be used to test whether gcc targets
PowerPC, on 64bit platforms _ARCH_PPC64 will be also defined.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6301 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-14 18:39:49 +00:00
pbrook
3a742b7643 Update old fashioned function prototypes.
Signed-off-by: Stefan Weil <weil@mail.berlios.de>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5511 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-22 15:55:18 +00:00
pbrook
49918a752b * Use function pointers for symbol lookup (currently for elf32 and elf64,
could be expanded).  This also fixes the bug with mips elf64 symbols
  in current Qemu trunk.

* Use quicksort and binary search for symbol lookup.

* Remove unneeded entries from symbol table.  This reduced a typical table
  size (linux mips kernel) from 1764487 to 11656 entries.

Signed-off-by: Stefan Weil <weil@mail.berlios.de> 



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5510 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-22 15:11:31 +00:00
blueswir1
a5f1b965da Fix warnings that would be generated by gcc -Wstrict-prototypes
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5021 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-17 20:21:51 +00:00
aurel32
f54b3f920f HPPA (PA-RISC) host support
(Stuart Brady)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4199 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-12 20:14:54 +00:00
ths
cbd669dae9 One more bit of alpha support.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3854 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-25 00:26:36 +00:00
ths
a25fd137c3 Wire up CRIS disassembler, by Edgar E. Iglesias.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3357 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-08 12:46:58 +00:00
j_mayer
237c0af017 Define the proper bfd_mach to be used by the disassembler for each
PowerPC emulated CPU.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3257 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-29 12:01:46 +00:00
ths
3b46e62427 find -type f | xargs sed -i 's/[\t ]*$//g' # Yes, again. Note the star in the regex.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3177 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-17 08:09:54 +00:00
ths
5fafdf24ef find -type f | xargs sed -i 's/[\t ]$//g' # on most files
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-16 21:08:06 +00:00
ths
8f860bb83c s390 disassembler support, by Ulrich Hecht.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3104 c046a42c-6fe2-441c-8c8c-71466251a162
2007-07-31 23:44:21 +00:00
ths
a8fcf883d9 One day we might support MIPS16...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2939 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-03 19:16:42 +00:00
ths
e91c8a7783 Spelling fixes, by Stefan Weil.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2927 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-03 13:35:16 +00:00
blueswir1
682c4f1559 Fix monitor disasm output for Sparc64 target
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2646 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-09 15:14:57 +00:00
blueswir1
6ecd453484 Fix generated code disasm output on Sparc64 host
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2638 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-08 11:22:29 +00:00
j_mayer
eddf68a6ac Integrate Alpha target in Qemu core.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2601 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-05 07:22:49 +00:00
pbrook
04e897efdd Remove duplicate TARGET_M68K case.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2280 c046a42c-6fe2-441c-8c8c-71466251a162
2007-01-01 14:14:34 +00:00
pbrook
e6e5906b6e ColdFire target.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2196 c046a42c-6fe2-441c-8c8c-71466251a162
2006-10-22 00:18:54 +00:00
pbrook
4615218210 Rewrite Arm host support.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2071 c046a42c-6fe2-441c-8c8c-71466251a162
2006-07-30 19:16:29 +00:00
bellard
26a76461f2 C99 64 bit printf
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2018 c046a42c-6fe2-441c-8c8c-71466251a162
2006-06-25 18:15:32 +00:00