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target/arm: Implement FMOV (immediate) for fp16
All the hard work is already done by vfp_expand_imm, we just need to
make sure we pick up the correct size.
Cc: qemu-stable@nongnu.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Tested-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180512003217.9105-11-richard.henderson@linaro.org
[rth: Merge unallocated_encoding check with TCGMemOp conversion.]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
(cherry picked from commit 6ba28ddb9b
)
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
This commit is contained in:
parent
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@ -5431,11 +5431,25 @@ static void disas_fp_imm(DisasContext *s, uint32_t insn)
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{
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int rd = extract32(insn, 0, 5);
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int imm8 = extract32(insn, 13, 8);
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int is_double = extract32(insn, 22, 2);
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int type = extract32(insn, 22, 2);
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uint64_t imm;
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TCGv_i64 tcg_res;
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TCGMemOp sz;
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if (is_double > 1) {
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switch (type) {
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case 0:
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sz = MO_32;
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break;
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case 1:
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sz = MO_64;
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break;
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case 3:
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sz = MO_16;
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if (arm_dc_feature(s, ARM_FEATURE_V8_FP16)) {
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break;
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}
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/* fallthru */
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default:
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unallocated_encoding(s);
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return;
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}
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@ -5444,7 +5458,7 @@ static void disas_fp_imm(DisasContext *s, uint32_t insn)
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return;
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}
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imm = vfp_expand_imm(MO_32 + is_double, imm8);
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imm = vfp_expand_imm(sz, imm8);
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tcg_res = tcg_const_i64(imm);
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write_fp_dreg(s, rd, tcg_res);
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