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sifive_u: Add clock DT node for GEM ethernet

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The GEM ethernet on SiFive unleashed has fixed input clock
of 125MHz as-per SiFive FU540 manual. This patch updates FDT
generation for QEMU sifive_u machine to provide fixed-rate
clock for GEM ethernet.

Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
This commit is contained in:
Anup Patel 2018-12-13 18:34:52 +00:00 committed by Palmer Dabbelt
parent a9a0c2d123
commit fe93582cf5
No known key found for this signature in database
GPG key ID: EF4CA1502CCBAB41
2 changed files with 19 additions and 2 deletions
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18
hw/riscv/sifive_u.c
View file

@ -85,7 +85,8 @@ static void create_fdt(SiFiveUState *s, const struct MemmapEntry *memmap,
int cpu;
uint32_t *cells;
char *nodename;
uint32_t plic_phandle;
char ethclk_names[] = "pclk\0hclk\0tx_clk";
uint32_t plic_phandle, ethclk_phandle;
fdt = s->fdt = create_device_tree(&s->fdt_size);
if (!fdt) {
@ -197,6 +198,17 @@ static void create_fdt(SiFiveUState *s, const struct MemmapEntry *memmap,
g_free(cells);
g_free(nodename);
nodename = g_strdup_printf("/soc/ethclk");
qemu_fdt_add_subnode(fdt, nodename);
qemu_fdt_setprop_string(fdt, nodename, "compatible", "fixed-clock");
qemu_fdt_setprop_cell(fdt, nodename, "#clock-cells", 0x0);
qemu_fdt_setprop_cell(fdt, nodename, "clock-frequency",
SIFIVE_U_GEM_CLOCK_FREQ);
qemu_fdt_setprop_cell(fdt, nodename, "phandle", 3);
qemu_fdt_setprop_cell(fdt, nodename, "linux,phandle", 3);
ethclk_phandle = qemu_fdt_get_phandle(fdt, nodename);
g_free(nodename);
nodename = g_strdup_printf("/soc/ethernet@%lx",
(long)memmap[SIFIVE_U_GEM].base);
qemu_fdt_add_subnode(fdt, nodename);
@ -208,6 +220,10 @@ static void create_fdt(SiFiveUState *s, const struct MemmapEntry *memmap,
qemu_fdt_setprop_string(fdt, nodename, "phy-mode", "gmii");
qemu_fdt_setprop_cells(fdt, nodename, "interrupt-parent", plic_phandle);
qemu_fdt_setprop_cells(fdt, nodename, "interrupts", SIFIVE_U_GEM_IRQ);
qemu_fdt_setprop_cells(fdt, nodename, "clocks",
ethclk_phandle, ethclk_phandle, ethclk_phandle);
qemu_fdt_setprop(fdt, nodename, "clocks-names", ethclk_names,
sizeof(ethclk_names));
qemu_fdt_setprop_cells(fdt, nodename, "#address-cells", 1);
qemu_fdt_setprop_cells(fdt, nodename, "#size-cells", 0);
g_free(nodename);

3
include/hw/riscv/sifive_u.h
View file

@ -63,7 +63,8 @@ enum {
};
enum {
SIFIVE_U_CLOCK_FREQ = 1000000000
SIFIVE_U_CLOCK_FREQ = 1000000000,
SIFIVE_U_GEM_CLOCK_FREQ = 125000000
};
#define SIFIVE_U_PLIC_HART_CONFIG "MS"