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vmxnet3: The vmxnet3 device is a PCIE endpoint
Report the 'express endpoint' capability if on a PCIE bus. Signed-off-by: Shmulik Ladkani <shmulik.ladkani@ravellosystems.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
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commit
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1 changed files with 52 additions and 1 deletions
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@ -40,7 +40,11 @@
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#define VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS_BIT 0
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#define VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS \
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(1 << VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS_BIT)
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#define VMXNET3_COMPAT_FLAG_DISABLE_PCIE_BIT 1
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#define VMXNET3_COMPAT_FLAG_DISABLE_PCIE \
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(1 << VMXNET3_COMPAT_FLAG_DISABLE_PCIE_BIT)
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#define VMXNET3_EXP_EP_OFFSET (0x48)
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#define VMXNET3_MSI_OFFSET(s) \
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((s)->compat_flags & VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS ? 0x50 : 0x84)
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#define VMXNET3_MSIX_OFFSET(s) \
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@ -121,6 +125,7 @@
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typedef struct VMXNET3Class {
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PCIDeviceClass parent_class;
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DeviceRealize parent_dc_realize;
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} VMXNET3Class;
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#define TYPE_VMXNET3 "vmxnet3"
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@ -2285,6 +2290,10 @@ static void vmxnet3_pci_realize(PCIDevice *pci_dev, Error **errp)
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vmxnet3_net_init(s);
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if (pci_is_express(pci_dev) && pci_bus_is_express(pci_dev->bus)) {
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pcie_endpoint_cap_init(pci_dev, VMXNET3_EXP_EP_OFFSET);
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}
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register_savevm(dev, "vmxnet3-msix", -1, 1,
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vmxnet3_msix_save, vmxnet3_msix_load, s);
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}
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@ -2554,6 +2563,29 @@ static const VMStateInfo int_state_info = {
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.put = vmxnet3_put_int_state
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};
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static bool vmxnet3_vmstate_need_pcie_device(void *opaque)
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{
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VMXNET3State *s = VMXNET3(opaque);
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return !(s->compat_flags & VMXNET3_COMPAT_FLAG_DISABLE_PCIE);
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}
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static bool vmxnet3_vmstate_test_pci_device(void *opaque, int version_id)
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{
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return !vmxnet3_vmstate_need_pcie_device(opaque);
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}
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static const VMStateDescription vmstate_vmxnet3_pcie_device = {
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.name = "vmxnet3/pcie",
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.version_id = 1,
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.minimum_version_id = 1,
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.needed = vmxnet3_vmstate_need_pcie_device,
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.fields = (VMStateField[]) {
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VMSTATE_PCIE_DEVICE(parent_obj, VMXNET3State),
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VMSTATE_END_OF_LIST()
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}
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};
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static const VMStateDescription vmstate_vmxnet3 = {
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.name = "vmxnet3",
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.version_id = 1,
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@ -2561,7 +2593,9 @@ static const VMStateDescription vmstate_vmxnet3 = {
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.pre_save = vmxnet3_pre_save,
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.post_load = vmxnet3_post_load,
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.fields = (VMStateField[]) {
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VMSTATE_PCI_DEVICE(parent_obj, VMXNET3State),
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VMSTATE_STRUCT_TEST(parent_obj, VMXNET3State,
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vmxnet3_vmstate_test_pci_device, 0,
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vmstate_pci_device, PCIDevice),
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VMSTATE_BOOL(rx_packets_compound, VMXNET3State),
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VMSTATE_BOOL(rx_vlan_stripping, VMXNET3State),
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VMSTATE_BOOL(lro_supported, VMXNET3State),
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@ -2596,6 +2630,7 @@ static const VMStateDescription vmstate_vmxnet3 = {
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},
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.subsections = (const VMStateDescription*[]) {
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&vmxstate_vmxnet3_mcast_list,
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&vmstate_vmxnet3_pcie_device,
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NULL
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}
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};
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@ -2607,10 +2642,24 @@ static Property vmxnet3_properties[] = {
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DEFINE_PROP_END_OF_LIST(),
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};
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static void vmxnet3_realize(DeviceState *qdev, Error **errp)
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{
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VMXNET3Class *vc = VMXNET3_DEVICE_GET_CLASS(qdev);
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PCIDevice *pci_dev = PCI_DEVICE(qdev);
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VMXNET3State *s = VMXNET3(qdev);
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if (!(s->compat_flags & VMXNET3_COMPAT_FLAG_DISABLE_PCIE)) {
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pci_dev->cap_present |= QEMU_PCI_CAP_EXPRESS;
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}
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vc->parent_dc_realize(qdev, errp);
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}
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static void vmxnet3_class_init(ObjectClass *class, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(class);
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PCIDeviceClass *c = PCI_DEVICE_CLASS(class);
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VMXNET3Class *vc = VMXNET3_DEVICE_CLASS(class);
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c->realize = vmxnet3_pci_realize;
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c->exit = vmxnet3_pci_uninit;
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@ -2620,6 +2669,8 @@ static void vmxnet3_class_init(ObjectClass *class, void *data)
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c->class_id = PCI_CLASS_NETWORK_ETHERNET;
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c->subsystem_vendor_id = PCI_VENDOR_ID_VMWARE;
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c->subsystem_id = PCI_DEVICE_ID_VMWARE_VMXNET3;
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vc->parent_dc_realize = dc->realize;
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dc->realize = vmxnet3_realize;
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dc->desc = "VMWare Paravirtualized Ethernet v3";
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dc->reset = vmxnet3_qdev_reset;
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dc->vmsd = &vmstate_vmxnet3;
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