mirror of
https://gitlab.com/qemu-project/qemu
synced 2024-10-14 15:02:54 +00:00
tcg: Drop tcg_const_*_vec
Replace with tcg_constant_vec*. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
parent
5a48476ec0
commit
f6ff9c2f8e
|
@ -999,10 +999,6 @@ void tcg_optimize(TCGContext *s);
|
||||||
/* Allocate a new temporary and initialize it with a constant. */
|
/* Allocate a new temporary and initialize it with a constant. */
|
||||||
TCGv_i32 tcg_const_i32(int32_t val);
|
TCGv_i32 tcg_const_i32(int32_t val);
|
||||||
TCGv_i64 tcg_const_i64(int64_t val);
|
TCGv_i64 tcg_const_i64(int64_t val);
|
||||||
TCGv_vec tcg_const_zeros_vec(TCGType);
|
|
||||||
TCGv_vec tcg_const_ones_vec(TCGType);
|
|
||||||
TCGv_vec tcg_const_zeros_vec_matching(TCGv_vec);
|
|
||||||
TCGv_vec tcg_const_ones_vec_matching(TCGv_vec);
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Locate or create a read-only temporary that is a constant.
|
* Locate or create a read-only temporary that is a constant.
|
||||||
|
|
|
@ -3651,6 +3651,7 @@ static void expand_vec_sari(TCGType type, unsigned vece,
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case MO_64:
|
case MO_64:
|
||||||
|
t1 = tcg_temp_new_vec(type);
|
||||||
if (imm <= 32) {
|
if (imm <= 32) {
|
||||||
/*
|
/*
|
||||||
* We can emulate a small sign extend by performing an arithmetic
|
* We can emulate a small sign extend by performing an arithmetic
|
||||||
|
@ -3659,24 +3660,22 @@ static void expand_vec_sari(TCGType type, unsigned vece,
|
||||||
* does not, so we have to bound the smaller shift -- we get the
|
* does not, so we have to bound the smaller shift -- we get the
|
||||||
* same result in the high half either way.
|
* same result in the high half either way.
|
||||||
*/
|
*/
|
||||||
t1 = tcg_temp_new_vec(type);
|
|
||||||
tcg_gen_sari_vec(MO_32, t1, v1, MIN(imm, 31));
|
tcg_gen_sari_vec(MO_32, t1, v1, MIN(imm, 31));
|
||||||
tcg_gen_shri_vec(MO_64, v0, v1, imm);
|
tcg_gen_shri_vec(MO_64, v0, v1, imm);
|
||||||
vec_gen_4(INDEX_op_x86_blend_vec, type, MO_32,
|
vec_gen_4(INDEX_op_x86_blend_vec, type, MO_32,
|
||||||
tcgv_vec_arg(v0), tcgv_vec_arg(v0),
|
tcgv_vec_arg(v0), tcgv_vec_arg(v0),
|
||||||
tcgv_vec_arg(t1), 0xaa);
|
tcgv_vec_arg(t1), 0xaa);
|
||||||
tcg_temp_free_vec(t1);
|
|
||||||
} else {
|
} else {
|
||||||
/* Otherwise we will need to use a compare vs 0 to produce
|
/* Otherwise we will need to use a compare vs 0 to produce
|
||||||
* the sign-extend, shift and merge.
|
* the sign-extend, shift and merge.
|
||||||
*/
|
*/
|
||||||
t1 = tcg_const_zeros_vec(type);
|
tcg_gen_cmp_vec(TCG_COND_GT, MO_64, t1,
|
||||||
tcg_gen_cmp_vec(TCG_COND_GT, MO_64, t1, t1, v1);
|
tcg_constant_vec(type, MO_64, 0), v1);
|
||||||
tcg_gen_shri_vec(MO_64, v0, v1, imm);
|
tcg_gen_shri_vec(MO_64, v0, v1, imm);
|
||||||
tcg_gen_shli_vec(MO_64, t1, t1, 64 - imm);
|
tcg_gen_shli_vec(MO_64, t1, t1, 64 - imm);
|
||||||
tcg_gen_or_vec(MO_64, v0, v0, t1);
|
tcg_gen_or_vec(MO_64, v0, v0, t1);
|
||||||
tcg_temp_free_vec(t1);
|
|
||||||
}
|
}
|
||||||
|
tcg_temp_free_vec(t1);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
default:
|
default:
|
||||||
|
|
|
@ -229,32 +229,6 @@ void tcg_gen_mov_vec(TCGv_vec r, TCGv_vec a)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
TCGv_vec tcg_const_zeros_vec(TCGType type)
|
|
||||||
{
|
|
||||||
TCGv_vec ret = tcg_temp_new_vec(type);
|
|
||||||
tcg_gen_dupi_vec(MO_64, ret, 0);
|
|
||||||
return ret;
|
|
||||||
}
|
|
||||||
|
|
||||||
TCGv_vec tcg_const_ones_vec(TCGType type)
|
|
||||||
{
|
|
||||||
TCGv_vec ret = tcg_temp_new_vec(type);
|
|
||||||
tcg_gen_dupi_vec(MO_64, ret, -1);
|
|
||||||
return ret;
|
|
||||||
}
|
|
||||||
|
|
||||||
TCGv_vec tcg_const_zeros_vec_matching(TCGv_vec m)
|
|
||||||
{
|
|
||||||
TCGTemp *t = tcgv_vec_temp(m);
|
|
||||||
return tcg_const_zeros_vec(t->base_type);
|
|
||||||
}
|
|
||||||
|
|
||||||
TCGv_vec tcg_const_ones_vec_matching(TCGv_vec m)
|
|
||||||
{
|
|
||||||
TCGTemp *t = tcgv_vec_temp(m);
|
|
||||||
return tcg_const_ones_vec(t->base_type);
|
|
||||||
}
|
|
||||||
|
|
||||||
void tcg_gen_dupi_vec(unsigned vece, TCGv_vec r, uint64_t a)
|
void tcg_gen_dupi_vec(unsigned vece, TCGv_vec r, uint64_t a)
|
||||||
{
|
{
|
||||||
TCGTemp *rt = tcgv_vec_temp(r);
|
TCGTemp *rt = tcgv_vec_temp(r);
|
||||||
|
@ -431,9 +405,7 @@ void tcg_gen_not_vec(unsigned vece, TCGv_vec r, TCGv_vec a)
|
||||||
const TCGOpcode *hold_list = tcg_swap_vecop_list(NULL);
|
const TCGOpcode *hold_list = tcg_swap_vecop_list(NULL);
|
||||||
|
|
||||||
if (!TCG_TARGET_HAS_not_vec || !do_op2(vece, r, a, INDEX_op_not_vec)) {
|
if (!TCG_TARGET_HAS_not_vec || !do_op2(vece, r, a, INDEX_op_not_vec)) {
|
||||||
TCGv_vec t = tcg_const_ones_vec_matching(r);
|
tcg_gen_xor_vec(0, r, a, tcg_constant_vec_matching(r, 0, -1));
|
||||||
tcg_gen_xor_vec(0, r, a, t);
|
|
||||||
tcg_temp_free_vec(t);
|
|
||||||
}
|
}
|
||||||
tcg_swap_vecop_list(hold_list);
|
tcg_swap_vecop_list(hold_list);
|
||||||
}
|
}
|
||||||
|
@ -446,9 +418,7 @@ void tcg_gen_neg_vec(unsigned vece, TCGv_vec r, TCGv_vec a)
|
||||||
hold_list = tcg_swap_vecop_list(NULL);
|
hold_list = tcg_swap_vecop_list(NULL);
|
||||||
|
|
||||||
if (!TCG_TARGET_HAS_neg_vec || !do_op2(vece, r, a, INDEX_op_neg_vec)) {
|
if (!TCG_TARGET_HAS_neg_vec || !do_op2(vece, r, a, INDEX_op_neg_vec)) {
|
||||||
TCGv_vec t = tcg_const_zeros_vec_matching(r);
|
tcg_gen_sub_vec(vece, r, tcg_constant_vec_matching(r, vece, 0), a);
|
||||||
tcg_gen_sub_vec(vece, r, t, a);
|
|
||||||
tcg_temp_free_vec(t);
|
|
||||||
}
|
}
|
||||||
tcg_swap_vecop_list(hold_list);
|
tcg_swap_vecop_list(hold_list);
|
||||||
}
|
}
|
||||||
|
|
Loading…
Reference in a new issue