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ppc/pnv: Introduce PowerNV machines with fixed CPU models
Make the current "powernv" machine an abstract type and derive from it new machines with specific CPU models: power8 and power9. The "powernv" machine is now an alias on the "powernv9" machine. Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20190731141233.1340-2-clg@kaod.org> [dwg: Adjust pnv-xscom-test to cope with this change] Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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parent
f47a08d1a7
commit
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70
hw/ppc/pnv.c
70
hw/ppc/pnv.c
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@ -605,9 +605,20 @@ static void pnv_chip_power9_pic_print_info(PnvChip *chip, Monitor *mon)
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pnv_psi_pic_print_info(&chip9->psi, mon);
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}
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static bool pnv_match_cpu(const char *default_type, const char *cpu_type)
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{
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PowerPCCPUClass *ppc_default =
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POWERPC_CPU_CLASS(object_class_by_name(default_type));
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PowerPCCPUClass *ppc =
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POWERPC_CPU_CLASS(object_class_by_name(cpu_type));
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return ppc_default->pvr_match(ppc_default, ppc->pvr);
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}
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static void pnv_init(MachineState *machine)
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{
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PnvMachineState *pnv = PNV_MACHINE(machine);
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MachineClass *mc = MACHINE_GET_CLASS(machine);
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MemoryRegion *ram;
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char *fw_filename;
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long fw_size;
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@ -667,13 +678,23 @@ static void pnv_init(MachineState *machine)
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}
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}
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/*
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* Check compatibility of the specified CPU with the machine
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* default.
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*/
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if (!pnv_match_cpu(mc->default_cpu_type, machine->cpu_type)) {
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error_report("invalid CPU model '%s' for %s machine",
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machine->cpu_type, mc->name);
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exit(1);
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}
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/* Create the processor chips */
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i = strlen(machine->cpu_type) - strlen(POWERPC_CPU_TYPE_SUFFIX);
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chip_typename = g_strdup_printf(PNV_CHIP_TYPE_NAME("%.*s"),
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i, machine->cpu_type);
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if (!object_class_by_name(chip_typename)) {
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error_report("invalid CPU model '%.*s' for %s machine",
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i, machine->cpu_type, MACHINE_GET_CLASS(machine)->name);
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error_report("invalid chip model '%.*s' for %s machine",
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i, machine->cpu_type, mc->name);
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exit(1);
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}
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@ -1351,17 +1372,38 @@ static void pnv_machine_class_props_init(ObjectClass *oc)
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NULL);
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}
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static void pnv_machine_class_init(ObjectClass *oc, void *data)
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static void pnv_machine_power8_class_init(ObjectClass *oc, void *data)
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{
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MachineClass *mc = MACHINE_CLASS(oc);
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XICSFabricClass *xic = XICS_FABRIC_CLASS(oc);
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mc->desc = "IBM PowerNV (Non-Virtualized) POWER8";
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mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power8_v2.0");
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xic->icp_get = pnv_icp_get;
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xic->ics_get = pnv_ics_get;
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xic->ics_resend = pnv_ics_resend;
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}
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static void pnv_machine_power9_class_init(ObjectClass *oc, void *data)
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{
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MachineClass *mc = MACHINE_CLASS(oc);
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mc->desc = "IBM PowerNV (Non-Virtualized) POWER9";
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mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power9_v2.0");
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mc->alias = "powernv";
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}
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static void pnv_machine_class_init(ObjectClass *oc, void *data)
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{
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MachineClass *mc = MACHINE_CLASS(oc);
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InterruptStatsProviderClass *ispc = INTERRUPT_STATS_PROVIDER_CLASS(oc);
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mc->desc = "IBM PowerNV (Non-Virtualized)";
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mc->init = pnv_init;
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mc->reset = pnv_reset;
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mc->max_cpus = MAX_CPUS;
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mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power8_v2.0");
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mc->block_default_type = IF_IDE; /* Pnv provides a AHCI device for
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* storage */
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mc->no_parallel = 1;
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@ -1371,9 +1413,6 @@ static void pnv_machine_class_init(ObjectClass *oc, void *data)
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* enough to fit the maximum initrd size at it's load address
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*/
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mc->default_ram_size = INITRD_LOAD_ADDR + INITRD_MAX_SIZE;
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xic->icp_get = pnv_icp_get;
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xic->ics_get = pnv_ics_get;
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xic->ics_resend = pnv_ics_resend;
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ispc->print_info = pnv_pic_print_info;
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pnv_machine_class_props_init(oc);
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@ -1393,10 +1432,27 @@ static void pnv_machine_class_init(ObjectClass *oc, void *data)
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.parent = TYPE_PNV9_CHIP, \
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}
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#define DEFINE_PNV_MACHINE_TYPE(cpu, class_initfn) \
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{ \
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.name = MACHINE_TYPE_NAME(cpu), \
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.parent = TYPE_PNV_MACHINE, \
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.instance_size = sizeof(PnvMachineState), \
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.instance_init = pnv_machine_instance_init, \
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.class_init = class_initfn, \
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.interfaces = (InterfaceInfo[]) { \
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{ TYPE_XICS_FABRIC }, \
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{ TYPE_INTERRUPT_STATS_PROVIDER }, \
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{ }, \
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}, \
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}
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static const TypeInfo types[] = {
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DEFINE_PNV_MACHINE_TYPE("powernv8", pnv_machine_power8_class_init),
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DEFINE_PNV_MACHINE_TYPE("powernv9", pnv_machine_power9_class_init),
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{
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.name = TYPE_PNV_MACHINE,
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.parent = TYPE_MACHINE,
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.abstract = true,
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.instance_size = sizeof(PnvMachineState),
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.instance_init = pnv_machine_instance_init,
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.class_init = pnv_machine_class_init,
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@ -77,9 +77,15 @@ static void test_xscom_cfam_id(QTestState *qts, const PnvChip *chip)
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static void test_cfam_id(const void *data)
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{
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const PnvChip *chip = data;
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const char *machine = "powernv8";
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QTestState *qts;
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qts = qtest_initf("-M powernv,accel=tcg -cpu %s", chip->cpu_model);
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if (chip->chip_type == PNV_CHIP_POWER9) {
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machine = "powernv9";
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}
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qts = qtest_initf("-M %s,accel=tcg -cpu %s",
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machine, chip->cpu_model);
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test_xscom_cfam_id(qts, chip);
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qtest_quit(qts);
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}
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@ -113,8 +119,14 @@ static void test_core(const void *data)
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{
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const PnvChip *chip = data;
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QTestState *qts;
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const char *machine = "powernv8";
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qts = qtest_initf("-M powernv,accel=tcg -cpu %s", chip->cpu_model);
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if (chip->chip_type == PNV_CHIP_POWER9) {
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machine = "powernv9";
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}
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qts = qtest_initf("-M %s,accel=tcg -cpu %s",
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machine, chip->cpu_model);
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test_xscom_core(qts, chip);
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qtest_quit(qts);
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}
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