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mirror of https://gitlab.com/qemu-project/qemu synced 2024-07-03 08:19:15 +00:00

hw/char/mcf_uart: Have mcf_uart_create() return DeviceState

There is no point in having mcf_uart_init() demote the DeviceState
pointer and return a void one. Directly return the real typedef.

mcf_uart_init() do both init + realize: rename as mcf_uart_create().

Similarly, mcf_uart_mm_init() do init / realize / mmap: rename as
mcf_uart_create_mmap().

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20231019104929.16517-1-philmd@linaro.org>
Signed-off-by: Thomas Huth <huth@tuxfamily.org>
This commit is contained in:
Philippe Mathieu-Daudé 2023-10-19 12:49:29 +02:00 committed by Thomas Huth
parent 7f090ed710
commit f213ccc968
4 changed files with 15 additions and 14 deletions

View File

@ -342,25 +342,26 @@ static void mcf_uart_register(void)
type_init(mcf_uart_register)
void *mcf_uart_init(qemu_irq irq, Chardev *chrdrv)
DeviceState *mcf_uart_create(qemu_irq irq, Chardev *chrdrv)
{
DeviceState *dev;
DeviceState *dev;
dev = qdev_new(TYPE_MCF_UART);
if (chrdrv) {
qdev_prop_set_chr(dev, "chardev", chrdrv);
}
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
return dev;
}
void mcf_uart_mm_init(hwaddr base, qemu_irq irq, Chardev *chrdrv)
DeviceState *mcf_uart_create_mmap(hwaddr base, qemu_irq irq, Chardev *chrdrv)
{
DeviceState *dev;
DeviceState *dev;
dev = mcf_uart_init(irq, chrdrv);
dev = mcf_uart_create(irq, chrdrv);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
return dev;
}

View File

@ -168,7 +168,7 @@ typedef struct {
MemoryRegion iomem;
qemu_irq *pic;
m5206_timer_state *timer[2];
void *uart[2];
DeviceState *uart[2];
uint8_t scr;
uint8_t icr[14];
uint16_t imr; /* 1 == interrupt is masked. */
@ -600,8 +600,8 @@ static void mcf5206_mbar_realize(DeviceState *dev, Error **errp)
s->pic = qemu_allocate_irqs(m5206_mbar_set_irq, s, 14);
s->timer[0] = m5206_timer_init(s->pic[9]);
s->timer[1] = m5206_timer_init(s->pic[10]);
s->uart[0] = mcf_uart_init(s->pic[12], serial_hd(0));
s->uart[1] = mcf_uart_init(s->pic[13], serial_hd(1));
s->uart[0] = mcf_uart_create(s->pic[12], serial_hd(0));
s->uart[1] = mcf_uart_create(s->pic[13], serial_hd(1));
}
static Property mcf5206_mbar_properties[] = {

View File

@ -261,9 +261,9 @@ static void mcf5208evb_init(MachineState *machine)
/* Internal peripherals. */
pic = mcf_intc_init(address_space_mem, 0xfc048000, cpu);
mcf_uart_mm_init(0xfc060000, pic[26], serial_hd(0));
mcf_uart_mm_init(0xfc064000, pic[27], serial_hd(1));
mcf_uart_mm_init(0xfc068000, pic[28], serial_hd(2));
mcf_uart_create_mmap(0xfc060000, pic[26], serial_hd(0));
mcf_uart_create_mmap(0xfc064000, pic[27], serial_hd(1));
mcf_uart_create_mmap(0xfc068000, pic[28], serial_hd(2));
mcf5208_sys_init(address_space_mem, pic);

View File

@ -10,8 +10,8 @@ uint64_t mcf_uart_read(void *opaque, hwaddr addr,
unsigned size);
void mcf_uart_write(void *opaque, hwaddr addr,
uint64_t val, unsigned size);
void *mcf_uart_init(qemu_irq irq, Chardev *chr);
void mcf_uart_mm_init(hwaddr base, qemu_irq irq, Chardev *chr);
DeviceState *mcf_uart_create(qemu_irq irq, Chardev *chr);
DeviceState *mcf_uart_create_mmap(hwaddr base, qemu_irq irq, Chardev *chr);
/* mcf_intc.c */
qemu_irq *mcf_intc_init(struct MemoryRegion *sysmem,