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target/loongarch: Implement LSX logic instructions

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This patch includes:
- V{AND/OR/XOR/NOR/ANDN/ORN}.V;
- V{AND/OR/XOR/NOR}I.B.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20230504122810.4094787-22-gaosong@loongson.cn>
This commit is contained in:
Song Gao 2023-05-04 20:27:47 +08:00
parent 789f4a4c86
commit f205a539f6
No known key found for this signature in database
GPG key ID: 40A2FFF239263EDF
5 changed files with 94 additions and 0 deletions
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12
target/loongarch/disas.c
View file

@ -1091,3 +1091,15 @@ INSN_LSX(vmskltz_w, vv)
INSN_LSX(vmskltz_d, vv)
INSN_LSX(vmskgez_b, vv)
INSN_LSX(vmsknz_b, vv)
INSN_LSX(vand_v, vvv)
INSN_LSX(vor_v, vvv)
INSN_LSX(vxor_v, vvv)
INSN_LSX(vnor_v, vvv)
INSN_LSX(vandn_v, vvv)
INSN_LSX(vorn_v, vvv)
INSN_LSX(vandi_b, vv_i)
INSN_LSX(vori_b, vv_i)
INSN_LSX(vxori_b, vv_i)
INSN_LSX(vnori_b, vv_i)

2
target/loongarch/helper.h
View file

@ -350,3 +350,5 @@ DEF_HELPER_3(vmskltz_w, void, env, i32, i32)
DEF_HELPER_3(vmskltz_d, void, env, i32, i32)
DEF_HELPER_3(vmskgez_b, void, env, i32, i32)
DEF_HELPER_3(vmsknz_b, void, env, i32,i32)
DEF_HELPER_FLAGS_4(vnori_b, TCG_CALL_NO_RWG, void, ptr, ptr, i64, i32)

56
target/loongarch/insn_trans/trans_lsx.c.inc
View file

@ -2874,3 +2874,59 @@ TRANS(vmskltz_w, gen_vv, gen_helper_vmskltz_w)
TRANS(vmskltz_d, gen_vv, gen_helper_vmskltz_d)
TRANS(vmskgez_b, gen_vv, gen_helper_vmskgez_b)
TRANS(vmsknz_b, gen_vv, gen_helper_vmsknz_b)
TRANS(vand_v, gvec_vvv, MO_64, tcg_gen_gvec_and)
TRANS(vor_v, gvec_vvv, MO_64, tcg_gen_gvec_or)
TRANS(vxor_v, gvec_vvv, MO_64, tcg_gen_gvec_xor)
TRANS(vnor_v, gvec_vvv, MO_64, tcg_gen_gvec_nor)
static bool trans_vandn_v(DisasContext *ctx, arg_vvv *a)
{
uint32_t vd_ofs, vj_ofs, vk_ofs;
CHECK_SXE;
vd_ofs = vec_full_offset(a->vd);
vj_ofs = vec_full_offset(a->vj);
vk_ofs = vec_full_offset(a->vk);
tcg_gen_gvec_andc(MO_64, vd_ofs, vk_ofs, vj_ofs, 16, ctx->vl/8);
return true;
}
TRANS(vorn_v, gvec_vvv, MO_64, tcg_gen_gvec_orc)
TRANS(vandi_b, gvec_vv_i, MO_8, tcg_gen_gvec_andi)
TRANS(vori_b, gvec_vv_i, MO_8, tcg_gen_gvec_ori)
TRANS(vxori_b, gvec_vv_i, MO_8, tcg_gen_gvec_xori)
static void gen_vnori(unsigned vece, TCGv_vec t, TCGv_vec a, int64_t imm)
{
TCGv_vec t1;
t1 = tcg_constant_vec_matching(t, vece, imm);
tcg_gen_nor_vec(vece, t, a, t1);
}
static void gen_vnori_b(TCGv_i64 t, TCGv_i64 a, int64_t imm)
{
tcg_gen_movi_i64(t, dup_const(MO_8, imm));
tcg_gen_nor_i64(t, a, t);
}
static void do_vnori_b(unsigned vece, uint32_t vd_ofs, uint32_t vj_ofs,
int64_t imm, uint32_t oprsz, uint32_t maxsz)
{
static const TCGOpcode vecop_list[] = {
INDEX_op_nor_vec, 0
};
static const GVecGen2i op = {
.fni8 = gen_vnori_b,
.fniv = gen_vnori,
.fnoi = gen_helper_vnori_b,
.opt_opc = vecop_list,
.vece = MO_8
};
tcg_gen_gvec_2i(vd_ofs, vj_ofs, oprsz, maxsz, imm, &op);
}
TRANS(vnori_b, gvec_vv_i, MO_8, do_vnori_b)

13
target/loongarch/insns.decode
View file

@ -503,6 +503,7 @@ dbcl 0000 00000010 10101 ............... @i15
@vv_ui4 .... ........ ..... . imm:4 vj:5 vd:5 &vv_i
@vv_ui5 .... ........ ..... imm:5 vj:5 vd:5 &vv_i
@vv_ui6 .... ........ .... imm:6 vj:5 vd:5 &vv_i
@vv_ui8 .... ........ .. imm:8 vj:5 vd:5 &vv_i
@vv_i5 .... ........ ..... imm:s5 vj:5 vd:5 &vv_i
vadd_b 0111 00000000 10100 ..... ..... ..... @vvv
@ -790,3 +791,15 @@ vmskltz_w 0111 00101001 11000 10010 ..... ..... @vv
vmskltz_d 0111 00101001 11000 10011 ..... ..... @vv
vmskgez_b 0111 00101001 11000 10100 ..... ..... @vv
vmsknz_b 0111 00101001 11000 11000 ..... ..... @vv
vand_v 0111 00010010 01100 ..... ..... ..... @vvv
vor_v 0111 00010010 01101 ..... ..... ..... @vvv
vxor_v 0111 00010010 01110 ..... ..... ..... @vvv
vnor_v 0111 00010010 01111 ..... ..... ..... @vvv
vandn_v 0111 00010010 10000 ..... ..... ..... @vvv
vorn_v 0111 00010010 10001 ..... ..... ..... @vvv
vandi_b 0111 00111101 00 ........ ..... ..... @vv_ui8
vori_b 0111 00111101 01 ........ ..... ..... @vv_ui8
vxori_b 0111 00111101 10 ........ ..... ..... @vv_ui8
vnori_b 0111 00111101 11 ........ ..... ..... @vv_ui8

11
target/loongarch/lsx_helper.c
View file

@ -782,3 +782,14 @@ void HELPER(vmsknz_b)(CPULoongArchState *env, uint32_t vd, uint32_t vj)
Vd->D(0) = (uint16_t)(~temp);
Vd->D(1) = 0;
}
void HELPER(vnori_b)(void *vd, void *vj, uint64_t imm, uint32_t v)
{
int i;
VReg *Vd = (VReg *)vd;
VReg *Vj = (VReg *)vj;
for (i = 0; i < LSX_LEN/8; i++) {
Vd->B(i) = ~(Vj->B(i) | (uint8_t)imm);
}
}