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target-xtensa: add SR accessibility unit tests

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Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
This commit is contained in:
Max Filippov 2012-12-05 07:15:25 +04:00 committed by Blue Swirl
parent b7909d81f7
commit efdfac94f4
3 changed files with 92 additions and 1 deletions
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1
tests/tcg/xtensa/Makefile
View file

@ -45,6 +45,7 @@ TESTCASES += test_rst0.tst
TESTCASES += test_sar.tst
TESTCASES += test_sext.tst
TESTCASES += test_shift.tst
TESTCASES += test_sr.tst
TESTCASES += test_timer.tst
TESTCASES += test_windowed.tst

2
tests/tcg/xtensa/macros.inc
View file

@ -1,7 +1,7 @@
.macro test_suite name
.data
status: .word result
result: .space 20
result: .space 256
.text
.global main
.align 4

90
tests/tcg/xtensa/test_sr.S Normal file
View file

@ -0,0 +1,90 @@
.include "macros.inc"
test_suite sr
.macro sr_op sym, op_sym, op_byte, sr
.if \sym
\op_sym a4, \sr
.else
.byte 0x40, \sr, \op_byte
.endif
.endm
.macro test_sr_op sym, mask, op, op_byte, sr
movi a4, 0
.if (\mask)
set_vector kernel, 0
sr_op \sym, \op, \op_byte, \sr
.else
set_vector kernel, 2f
1:
sr_op \sym, \op, \op_byte, \sr
test_fail
2:
reset_ps
rsr a2, exccause
assert eqi, a2, 0
rsr a2, epc1
movi a3, 1b
assert eq, a2, a3
.endif
.endm
.macro test_sr_mask sr, sym, mask
test \sr
test_sr_op \sym, \mask & 1, rsr, 0x03, \sr
test_sr_op \sym, \mask & 2, wsr, 0x13, \sr
test_sr_op \sym, \mask & 4, xsr, 0x61, \sr
test_end
.endm
.macro test_sr sr, conf
test_sr_mask \sr, \conf, 7
.endm
test_sr acchi, 1
test_sr acclo, 1
test_sr_mask /*atomctl*/99, 0, 0
test_sr_mask /*br*/4, 0, 0
test_sr_mask /*cacheattr*/98, 0, 0
test_sr ccompare0, 1
test_sr ccount, 1
test_sr cpenable, 1
test_sr dbreaka0, 1
test_sr dbreakc0, 1
test_sr_mask debugcause, 1, 1
test_sr depc, 1
test_sr dtlbcfg, 1
test_sr epc1, 1
test_sr epc2, 1
test_sr eps2, 1
test_sr exccause, 1
test_sr excsave1, 1
test_sr excsave2, 1
test_sr excvaddr, 1
test_sr ibreaka0, 1
test_sr ibreakenable, 1
test_sr icount, 1
test_sr icountlevel, 1
test_sr_mask /*intclear*/227, 0, 2
test_sr_mask /*interrupt*/226, 0, 3
test_sr intenable, 1
test_sr itlbcfg, 1
test_sr lbeg, 1
test_sr lcount, 1
test_sr lend, 1
test_sr litbase, 1
test_sr m0, 1
test_sr misc0, 1
test_sr_mask /*prefctl*/40, 0, 0
test_sr_mask /*prid*/235, 0, 1
test_sr ps, 1
test_sr ptevaddr, 1
test_sr rasid, 1
test_sr sar, 1
test_sr scompare1, 1
test_sr vecbase, 1
test_sr windowbase, 1
test_sr windowstart, 1
test_suite_end