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hw/ide/macio: switch from using qemu_allocate_irq() to qdev input GPIOs
This prevents the IRQs from being leaked when the macio IDE device is used. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240628160334.653168-1-mark.cave-ayland@ilande.co.uk> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
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@ -420,7 +420,8 @@ static void macio_ide_realizefn(DeviceState *dev, Error **errp)
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{
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MACIOIDEState *s = MACIO_IDE(dev);
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ide_bus_init_output_irq(&s->bus, s->ide_irq);
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ide_bus_init_output_irq(&s->bus,
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qdev_get_gpio_in(dev, MACIO_IDE_PMAC_IDE_IRQ));
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/* Register DMA callbacks */
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s->dma.ops = &dbdma_ops;
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@ -456,8 +457,8 @@ static void macio_ide_initfn(Object *obj)
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sysbus_init_mmio(d, &s->mem);
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sysbus_init_irq(d, &s->real_ide_irq);
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sysbus_init_irq(d, &s->real_dma_irq);
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s->dma_irq = qemu_allocate_irq(pmac_ide_irq, s, 0);
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s->ide_irq = qemu_allocate_irq(pmac_ide_irq, s, 1);
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qdev_init_gpio_in(DEVICE(obj), pmac_ide_irq, MACIO_IDE_PMAC_NIRQS);
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object_property_add_link(obj, "dbdma", TYPE_MAC_DBDMA,
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(Object **) &s->dbdma,
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@ -508,7 +509,8 @@ void macio_ide_init_drives(MACIOIDEState *s, DriveInfo **hd_table)
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void macio_ide_register_dma(MACIOIDEState *s)
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{
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DBDMA_register_channel(s->dbdma, s->channel, s->dma_irq,
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DBDMA_register_channel(s->dbdma, s->channel,
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qdev_get_gpio_in(DEVICE(s), MACIO_IDE_PMAC_DMA_IRQ),
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pmac_ide_transfer, pmac_ide_flush, s);
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}
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@ -80,8 +80,6 @@ struct MACIOIDEState {
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uint32_t channel;
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qemu_irq real_ide_irq;
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qemu_irq real_dma_irq;
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qemu_irq ide_irq;
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qemu_irq dma_irq;
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MemoryRegion mem;
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IDEBus bus;
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@ -92,6 +90,11 @@ struct MACIOIDEState {
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uint32_t irq_reg;
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};
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#define MACIO_IDE_PMAC_NIRQS 2
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#define MACIO_IDE_PMAC_DMA_IRQ 0
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#define MACIO_IDE_PMAC_IDE_IRQ 1
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void macio_ide_init_drives(MACIOIDEState *ide, DriveInfo **hd_table);
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void macio_ide_register_dma(MACIOIDEState *ide);
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