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hw/ide/macio: switch from using qemu_allocate_irq() to qdev input GPIOs

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This prevents the IRQs from being leaked when the macio IDE device is used.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20240628160334.653168-1-mark.cave-ayland@ilande.co.uk>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
This commit is contained in:
Mark Cave-Ayland 2024-06-28 17:03:34 +01:00 committed by Philippe Mathieu-Daudé
parent 0ff3243a46
commit efb359346c
2 changed files with 11 additions and 6 deletions
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10
hw/ide/macio.c
View file

@ -420,7 +420,8 @@ static void macio_ide_realizefn(DeviceState *dev, Error **errp)
{
MACIOIDEState *s = MACIO_IDE(dev);
ide_bus_init_output_irq(&s->bus, s->ide_irq);
ide_bus_init_output_irq(&s->bus,
qdev_get_gpio_in(dev, MACIO_IDE_PMAC_IDE_IRQ));
/* Register DMA callbacks */
s->dma.ops = &dbdma_ops;
@ -456,8 +457,8 @@ static void macio_ide_initfn(Object *obj)
sysbus_init_mmio(d, &s->mem);
sysbus_init_irq(d, &s->real_ide_irq);
sysbus_init_irq(d, &s->real_dma_irq);
s->dma_irq = qemu_allocate_irq(pmac_ide_irq, s, 0);
s->ide_irq = qemu_allocate_irq(pmac_ide_irq, s, 1);
qdev_init_gpio_in(DEVICE(obj), pmac_ide_irq, MACIO_IDE_PMAC_NIRQS);
object_property_add_link(obj, "dbdma", TYPE_MAC_DBDMA,
(Object **) &s->dbdma,
@ -508,7 +509,8 @@ void macio_ide_init_drives(MACIOIDEState *s, DriveInfo **hd_table)
void macio_ide_register_dma(MACIOIDEState *s)
{
DBDMA_register_channel(s->dbdma, s->channel, s->dma_irq,
DBDMA_register_channel(s->dbdma, s->channel,
qdev_get_gpio_in(DEVICE(s), MACIO_IDE_PMAC_DMA_IRQ),
pmac_ide_transfer, pmac_ide_flush, s);
}

7
include/hw/misc/macio/macio.h
View file

@ -80,8 +80,6 @@ struct MACIOIDEState {
uint32_t channel;
qemu_irq real_ide_irq;
qemu_irq real_dma_irq;
qemu_irq ide_irq;
qemu_irq dma_irq;
MemoryRegion mem;
IDEBus bus;
@ -92,6 +90,11 @@ struct MACIOIDEState {
uint32_t irq_reg;
};
#define MACIO_IDE_PMAC_NIRQS 2
#define MACIO_IDE_PMAC_DMA_IRQ 0
#define MACIO_IDE_PMAC_IDE_IRQ 1
void macio_ide_init_drives(MACIOIDEState *ide, DriveInfo **hd_table);
void macio_ide_register_dma(MACIOIDEState *ide);