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https://gitlab.com/qemu-project/qemu
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misc: Use cpu_physical_memory_read and cpu_physical_memory_write
These functions don't need type casts (as does cpu_physical_memory_rw) and also make the code better readable. Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
This commit is contained in:
parent
411f491e0a
commit
eb6282f230
4 changed files with 23 additions and 26 deletions
2
cpus.c
2
cpus.c
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@ -1454,7 +1454,7 @@ void qmp_pmemsave(int64_t addr, int64_t size, const char *filename,
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l = sizeof(buf);
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l = sizeof(buf);
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if (l > size)
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if (l > size)
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l = size;
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l = size;
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cpu_physical_memory_rw(addr, buf, l, 0);
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cpu_physical_memory_read(addr, buf, l);
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if (fwrite(buf, 1, l, f) != l) {
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if (fwrite(buf, 1, l, f) != l) {
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error_set(errp, QERR_IO_ERROR);
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error_set(errp, QERR_IO_ERROR);
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goto exit;
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goto exit;
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@ -124,14 +124,14 @@ static const TPRInstruction tpr_instr[] = {
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static void read_guest_rom_state(VAPICROMState *s)
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static void read_guest_rom_state(VAPICROMState *s)
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{
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{
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cpu_physical_memory_rw(s->rom_state_paddr, (void *)&s->rom_state,
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cpu_physical_memory_read(s->rom_state_paddr, &s->rom_state,
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sizeof(GuestROMState), 0);
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sizeof(GuestROMState));
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}
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}
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static void write_guest_rom_state(VAPICROMState *s)
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static void write_guest_rom_state(VAPICROMState *s)
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{
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{
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cpu_physical_memory_rw(s->rom_state_paddr, (void *)&s->rom_state,
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cpu_physical_memory_write(s->rom_state_paddr, &s->rom_state,
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sizeof(GuestROMState), 1);
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sizeof(GuestROMState));
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}
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}
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static void update_guest_rom_state(VAPICROMState *s)
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static void update_guest_rom_state(VAPICROMState *s)
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@ -311,16 +311,14 @@ static int update_rom_mapping(VAPICROMState *s, CPUX86State *env, target_ulong i
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for (pos = le32_to_cpu(s->rom_state.fixup_start);
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for (pos = le32_to_cpu(s->rom_state.fixup_start);
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pos < le32_to_cpu(s->rom_state.fixup_end);
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pos < le32_to_cpu(s->rom_state.fixup_end);
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pos += 4) {
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pos += 4) {
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cpu_physical_memory_rw(paddr + pos - s->rom_state.vaddr,
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cpu_physical_memory_read(paddr + pos - s->rom_state.vaddr,
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(void *)&offset, sizeof(offset), 0);
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&offset, sizeof(offset));
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offset = le32_to_cpu(offset);
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offset = le32_to_cpu(offset);
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cpu_physical_memory_rw(paddr + offset, (void *)&patch,
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cpu_physical_memory_read(paddr + offset, &patch, sizeof(patch));
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sizeof(patch), 0);
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patch = le32_to_cpu(patch);
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patch = le32_to_cpu(patch);
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patch += rom_state_vaddr - le32_to_cpu(s->rom_state.vaddr);
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patch += rom_state_vaddr - le32_to_cpu(s->rom_state.vaddr);
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patch = cpu_to_le32(patch);
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patch = cpu_to_le32(patch);
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cpu_physical_memory_rw(paddr + offset, (void *)&patch,
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cpu_physical_memory_write(paddr + offset, &patch, sizeof(patch));
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sizeof(patch), 1);
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}
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}
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read_guest_rom_state(s);
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read_guest_rom_state(s);
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s->vapic_paddr = paddr + le32_to_cpu(s->rom_state.vapic_vaddr) -
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s->vapic_paddr = paddr + le32_to_cpu(s->rom_state.vapic_vaddr) -
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@ -364,8 +362,8 @@ static int vapic_enable(VAPICROMState *s, X86CPU *cpu)
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}
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}
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vapic_paddr = s->vapic_paddr +
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vapic_paddr = s->vapic_paddr +
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(((hwaddr)cpu_number) << VAPIC_CPU_SHIFT);
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(((hwaddr)cpu_number) << VAPIC_CPU_SHIFT);
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cpu_physical_memory_rw(vapic_paddr + offsetof(VAPICState, enabled),
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cpu_physical_memory_write(vapic_paddr + offsetof(VAPICState, enabled),
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(void *)&enabled, sizeof(enabled), 1);
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&enabled, sizeof(enabled));
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apic_enable_vapic(cpu->apic_state, vapic_paddr);
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apic_enable_vapic(cpu->apic_state, vapic_paddr);
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s->state = VAPIC_ACTIVE;
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s->state = VAPIC_ACTIVE;
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@ -535,7 +533,7 @@ static int patch_hypercalls(VAPICROMState *s)
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uint8_t *rom;
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uint8_t *rom;
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rom = g_malloc(s->rom_size);
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rom = g_malloc(s->rom_size);
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cpu_physical_memory_rw(rom_paddr, rom, s->rom_size, 0);
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cpu_physical_memory_read(rom_paddr, rom, s->rom_size);
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for (pos = 0; pos < s->rom_size - sizeof(vmcall_pattern); pos++) {
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for (pos = 0; pos < s->rom_size - sizeof(vmcall_pattern); pos++) {
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if (kvm_irqchip_in_kernel()) {
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if (kvm_irqchip_in_kernel()) {
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@ -551,8 +549,7 @@ static int patch_hypercalls(VAPICROMState *s)
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}
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}
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if (memcmp(rom + pos, pattern, 7) == 0 &&
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if (memcmp(rom + pos, pattern, 7) == 0 &&
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(rom[pos + 7] == alternates[0] || rom[pos + 7] == alternates[1])) {
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(rom[pos + 7] == alternates[0] || rom[pos + 7] == alternates[1])) {
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cpu_physical_memory_rw(rom_paddr + pos + 5, (uint8_t *)patch,
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cpu_physical_memory_write(rom_paddr + pos + 5, patch, 3);
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3, 1);
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/*
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/*
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* Don't flush the tb here. Under ordinary conditions, the patched
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* Don't flush the tb here. Under ordinary conditions, the patched
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* calls are miles away from the current IP. Under malicious
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* calls are miles away from the current IP. Under malicious
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@ -760,8 +757,8 @@ static int vapic_post_load(void *opaque, int version_id)
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run_on_cpu(first_cpu, do_vapic_enable, s);
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run_on_cpu(first_cpu, do_vapic_enable, s);
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} else {
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} else {
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zero = g_malloc0(s->rom_state.vapic_size);
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zero = g_malloc0(s->rom_state.vapic_size);
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cpu_physical_memory_rw(s->vapic_paddr, zero,
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cpu_physical_memory_write(s->vapic_paddr, zero,
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s->rom_state.vapic_size, 1);
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s->rom_state.vapic_size);
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g_free(zero);
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g_free(zero);
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}
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}
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}
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}
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@ -98,8 +98,8 @@ static void apic_sync_vapic(APICCommonState *s, int sync_type)
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return;
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return;
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}
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}
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if (sync_type & SYNC_FROM_VAPIC) {
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if (sync_type & SYNC_FROM_VAPIC) {
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cpu_physical_memory_rw(s->vapic_paddr, (void *)&vapic_state,
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cpu_physical_memory_read(s->vapic_paddr, &vapic_state,
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sizeof(vapic_state), 0);
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sizeof(vapic_state));
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s->tpr = vapic_state.tpr;
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s->tpr = vapic_state.tpr;
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}
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}
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if (sync_type & (SYNC_TO_VAPIC | SYNC_ISR_IRR_TO_VAPIC)) {
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if (sync_type & (SYNC_TO_VAPIC | SYNC_ISR_IRR_TO_VAPIC)) {
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@ -336,7 +336,7 @@ uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0,
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ebcdic_put(sysib.model, "QEMU ", 16);
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ebcdic_put(sysib.model, "QEMU ", 16);
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ebcdic_put(sysib.sequence, "QEMU ", 16);
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ebcdic_put(sysib.sequence, "QEMU ", 16);
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ebcdic_put(sysib.plant, "QEMU", 4);
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ebcdic_put(sysib.plant, "QEMU", 4);
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cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
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cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
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} else if ((sel1 == 2) && (sel2 == 1)) {
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} else if ((sel1 == 2) && (sel2 == 1)) {
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/* Basic Machine CPU */
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/* Basic Machine CPU */
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struct sysib_121 sysib;
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struct sysib_121 sysib;
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@ -346,7 +346,7 @@ uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0,
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ebcdic_put(sysib.sequence, "QEMUQEMUQEMUQEMU", 16);
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ebcdic_put(sysib.sequence, "QEMUQEMUQEMUQEMU", 16);
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ebcdic_put(sysib.plant, "QEMU", 4);
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ebcdic_put(sysib.plant, "QEMU", 4);
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stw_p(&sysib.cpu_addr, env->cpu_num);
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stw_p(&sysib.cpu_addr, env->cpu_num);
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cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
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cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
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} else if ((sel1 == 2) && (sel2 == 2)) {
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} else if ((sel1 == 2) && (sel2 == 2)) {
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/* Basic Machine CPUs */
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/* Basic Machine CPUs */
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struct sysib_122 sysib;
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struct sysib_122 sysib;
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@ -358,7 +358,7 @@ uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0,
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stw_p(&sysib.active_cpus, 1);
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stw_p(&sysib.active_cpus, 1);
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stw_p(&sysib.standby_cpus, 0);
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stw_p(&sysib.standby_cpus, 0);
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stw_p(&sysib.reserved_cpus, 0);
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stw_p(&sysib.reserved_cpus, 0);
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cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
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cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
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} else {
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} else {
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cc = 3;
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cc = 3;
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}
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}
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ebcdic_put(sysib.plant, "QEMU", 4);
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ebcdic_put(sysib.plant, "QEMU", 4);
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stw_p(&sysib.cpu_addr, env->cpu_num);
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stw_p(&sysib.cpu_addr, env->cpu_num);
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stw_p(&sysib.cpu_id, 0);
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stw_p(&sysib.cpu_id, 0);
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cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
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cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
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} else if ((sel1 == 2) && (sel2 == 2)) {
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} else if ((sel1 == 2) && (sel2 == 2)) {
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/* LPAR CPUs */
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/* LPAR CPUs */
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struct sysib_222 sysib;
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struct sysib_222 sysib;
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stl_p(&sysib.caf, 1000);
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stl_p(&sysib.caf, 1000);
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stw_p(&sysib.dedicated_cpus, 0);
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stw_p(&sysib.dedicated_cpus, 0);
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stw_p(&sysib.shared_cpus, 0);
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stw_p(&sysib.shared_cpus, 0);
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cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
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cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
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} else {
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} else {
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cc = 3;
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cc = 3;
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}
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}
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@ -414,7 +414,7 @@ uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0,
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ebcdic_put(sysib.vm[0].name, "KVMguest", 8);
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ebcdic_put(sysib.vm[0].name, "KVMguest", 8);
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stl_p(&sysib.vm[0].caf, 1000);
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stl_p(&sysib.vm[0].caf, 1000);
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ebcdic_put(sysib.vm[0].cpi, "KVM/Linux ", 16);
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ebcdic_put(sysib.vm[0].cpi, "KVM/Linux ", 16);
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cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
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cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
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} else {
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} else {
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cc = 3;
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cc = 3;
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}
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}
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