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https://gitlab.com/qemu-project/qemu
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mips_malta: convert to memory API
Signed-off-by: Avi Kivity <avi@redhat.com>
This commit is contained in:
parent
60581b3777
commit
ea85df72b6
1 changed files with 26 additions and 27 deletions
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@ -57,6 +57,9 @@
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#define MAX_IDE_BUS 2
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typedef struct {
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MemoryRegion iomem;
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MemoryRegion iomem_lo; /* 0 - 0x900 */
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MemoryRegion iomem_hi; /* 0xa00 - 0x100000 */
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uint32_t leds;
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uint32_t brk;
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uint32_t gpout;
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@ -215,7 +218,8 @@ static void eeprom24c0x_write(int scl, int sda)
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eeprom.sda = sda;
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}
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static uint32_t malta_fpga_readl(void *opaque, target_phys_addr_t addr)
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static uint64_t malta_fpga_read(void *opaque, target_phys_addr_t addr,
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unsigned size)
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{
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MaltaFPGAState *s = opaque;
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uint32_t val = 0;
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@ -302,8 +306,8 @@ static uint32_t malta_fpga_readl(void *opaque, target_phys_addr_t addr)
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return val;
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}
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static void malta_fpga_writel(void *opaque, target_phys_addr_t addr,
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uint32_t val)
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static void malta_fpga_write(void *opaque, target_phys_addr_t addr,
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uint64_t val, unsigned size)
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{
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MaltaFPGAState *s = opaque;
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uint32_t saddr;
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@ -328,7 +332,7 @@ static void malta_fpga_writel(void *opaque, target_phys_addr_t addr,
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/* ASCIIWORD Register */
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case 0x00410:
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snprintf(s->display_text, 9, "%08X", val);
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snprintf(s->display_text, 9, "%08X", (uint32_t)val);
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malta_fpga_update_display(s);
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break;
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@ -388,16 +392,10 @@ static void malta_fpga_writel(void *opaque, target_phys_addr_t addr,
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}
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}
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static CPUReadMemoryFunc * const malta_fpga_read[] = {
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malta_fpga_readl,
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malta_fpga_readl,
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malta_fpga_readl
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};
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static CPUWriteMemoryFunc * const malta_fpga_write[] = {
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malta_fpga_writel,
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malta_fpga_writel,
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malta_fpga_writel
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static const MemoryRegionOps malta_fpga_ops = {
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.read = malta_fpga_read,
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.write = malta_fpga_write,
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.endianness = DEVICE_NATIVE_ENDIAN,
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};
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static void malta_fpga_reset(void *opaque)
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@ -429,20 +427,22 @@ static void malta_fpga_led_init(CharDriverState *chr)
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qemu_chr_fe_printf(chr, "+--------+\r\n");
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}
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static MaltaFPGAState *malta_fpga_init(target_phys_addr_t base, qemu_irq uart_irq, CharDriverState *uart_chr)
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static MaltaFPGAState *malta_fpga_init(MemoryRegion *address_space,
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target_phys_addr_t base, qemu_irq uart_irq, CharDriverState *uart_chr)
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{
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MaltaFPGAState *s;
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int malta;
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s = (MaltaFPGAState *)g_malloc0(sizeof(MaltaFPGAState));
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malta = cpu_register_io_memory(malta_fpga_read,
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malta_fpga_write, s,
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DEVICE_NATIVE_ENDIAN);
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memory_region_init_io(&s->iomem, &malta_fpga_ops, s,
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"malta-fpga", 0x100000);
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memory_region_init_alias(&s->iomem_lo, "malta-fpga",
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&s->iomem, 0, 0x900);
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memory_region_init_alias(&s->iomem_hi, "malta-fpga",
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&s->iomem, 0xa00, 0x10000-0xa00);
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cpu_register_physical_memory(base, 0x900, malta);
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/* 0xa00 is less than a page, so will still get the right offsets. */
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cpu_register_physical_memory(base + 0xa00, 0x100000 - 0xa00, malta);
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memory_region_add_subregion(address_space, base, &s->iomem_lo);
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memory_region_add_subregion(address_space, base + 0xa00, &s->iomem_hi);
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s->display = qemu_chr_new("fpga", "vc:320x200", malta_fpga_led_init);
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@ -771,8 +771,8 @@ void mips_malta_init (ram_addr_t ram_size,
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{
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char *filename;
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pflash_t *fl;
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ram_addr_t ram_offset;
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MemoryRegion *system_memory = get_system_memory();
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MemoryRegion *ram = g_new(MemoryRegion, 1);
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MemoryRegion *bios, *bios_alias = g_new(MemoryRegion, 1);
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target_long bios_size;
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int64_t kernel_entry;
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@ -828,9 +828,8 @@ void mips_malta_init (ram_addr_t ram_size,
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((unsigned int)ram_size / (1 << 20)));
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exit(1);
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}
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ram_offset = qemu_ram_alloc(NULL, "mips_malta.ram", ram_size);
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cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
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memory_region_init_ram(ram, NULL, "mips_malta.ram", ram_size);
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memory_region_add_subregion(system_memory, 0, ram);
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#ifdef TARGET_WORDS_BIGENDIAN
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be = 1;
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@ -838,7 +837,7 @@ void mips_malta_init (ram_addr_t ram_size,
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be = 0;
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#endif
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/* FPGA */
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malta_fpga_init(0x1f000000LL, env->irq[2], serial_hds[2]);
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malta_fpga_init(system_memory, 0x1f000000LL, env->irq[2], serial_hds[2]);
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/* Load firmware in flash / BIOS unless we boot directly into a kernel. */
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if (kernel_filename) {
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