system/qemu
system/qemu
1
0
Fork 0
mirror of https://gitlab.com/qemu-project/qemu synced 2024-07-22 10:55:31 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

hw/pci-bridge/pxb: Fix missing swizzle

Browse source 
pxb_map_irq_fn() handled the necessary removal of the swizzle
applied to the PXB interrupts by the bus to which it was attached
but neglected to apply the normal swizzle for PCI root ports
on the expander bridge.

Result of this was on ARM virt, the PME interrupts for a second
RP on a PXB instance were miss-routed to #45 rather than #46.

Tested with a selection of different configurations with 1 to 5
RP per PXB instance.  Note on my x86 test setup the PME interrupts
are not triggered so I haven't been able to test this.

Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Michael S. Tsirkin <mst@redhat.com>
Cc: Marcel Apfelbaum <marcel.apfelbaum@gmail.com>
Message-Id: <20220118174855.19325-1-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
This commit is contained in:
Jonathan Cameron 2022-01-18 17:48:55 +00:00 committed by Michael S. Tsirkin
parent f59fb1889f
commit e609301b45
1 changed files with 6 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

6
hw/pci-bridge/pci_expander_bridge.c
View file

@ -192,6 +192,12 @@ static int pxb_map_irq_fn(PCIDevice *pci_dev, int pin)
{
PCIDevice *pxb = pci_get_bus(pci_dev)->parent_dev;
/*
* First carry out normal swizzle to handle
* multple root ports on a pxb instance.
*/
pin = pci_swizzle_map_irq_fn(pci_dev, pin);
/*
* The bios does not index the pxb slot number when
* it computes the IRQ because it resides on bus 0