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https://gitlab.com/qemu-project/qemu
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accel/tcg: Standardize atomic helpers on softmmu api
Reduce the amount of code duplication by always passing the TCGMemOpIdx argument to helper_atomic_*. This is not currently used for user-only, but it's easy to ignore. Tested-by: Cole Robinson <crobinso@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson
parent
be9568b4e0
commit
e28a866438
5 changed files with 82 additions and 143 deletions
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@ -52,3 +52,73 @@ void atomic_trace_st_post(CPUArchState *env, target_ulong addr, uint16_t info)
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{
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qemu_plugin_vcpu_mem_cb(env_cpu(env), addr, info);
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}
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/*
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* Atomic helpers callable from TCG.
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* These have a common interface and all defer to cpu_atomic_*
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* using the host return address from GETPC().
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*/
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#define CMPXCHG_HELPER(OP, TYPE) \
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TYPE HELPER(atomic_##OP)(CPUArchState *env, target_ulong addr, \
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TYPE oldv, TYPE newv, uint32_t oi) \
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{ return cpu_atomic_##OP##_mmu(env, addr, oldv, newv, oi, GETPC()); }
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CMPXCHG_HELPER(cmpxchgb, uint32_t)
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CMPXCHG_HELPER(cmpxchgw_be, uint32_t)
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CMPXCHG_HELPER(cmpxchgw_le, uint32_t)
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CMPXCHG_HELPER(cmpxchgl_be, uint32_t)
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CMPXCHG_HELPER(cmpxchgl_le, uint32_t)
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#ifdef CONFIG_ATOMIC64
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CMPXCHG_HELPER(cmpxchgq_be, uint64_t)
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CMPXCHG_HELPER(cmpxchgq_le, uint64_t)
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#endif
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#undef CMPXCHG_HELPER
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#define ATOMIC_HELPER(OP, TYPE) \
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TYPE HELPER(glue(atomic_,OP))(CPUArchState *env, target_ulong addr, \
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TYPE val, uint32_t oi) \
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{ return glue(glue(cpu_atomic_,OP),_mmu)(env, addr, val, oi, GETPC()); }
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#ifdef CONFIG_ATOMIC64
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#define GEN_ATOMIC_HELPERS(OP) \
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ATOMIC_HELPER(glue(OP,b), uint32_t) \
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ATOMIC_HELPER(glue(OP,w_be), uint32_t) \
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ATOMIC_HELPER(glue(OP,w_le), uint32_t) \
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ATOMIC_HELPER(glue(OP,l_be), uint32_t) \
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ATOMIC_HELPER(glue(OP,l_le), uint32_t) \
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ATOMIC_HELPER(glue(OP,q_be), uint64_t) \
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ATOMIC_HELPER(glue(OP,q_le), uint64_t)
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#else
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#define GEN_ATOMIC_HELPERS(OP) \
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ATOMIC_HELPER(glue(OP,b), uint32_t) \
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ATOMIC_HELPER(glue(OP,w_be), uint32_t) \
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ATOMIC_HELPER(glue(OP,w_le), uint32_t) \
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ATOMIC_HELPER(glue(OP,l_be), uint32_t) \
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ATOMIC_HELPER(glue(OP,l_le), uint32_t)
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#endif
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GEN_ATOMIC_HELPERS(fetch_add)
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GEN_ATOMIC_HELPERS(fetch_and)
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GEN_ATOMIC_HELPERS(fetch_or)
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GEN_ATOMIC_HELPERS(fetch_xor)
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GEN_ATOMIC_HELPERS(fetch_smin)
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GEN_ATOMIC_HELPERS(fetch_umin)
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GEN_ATOMIC_HELPERS(fetch_smax)
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GEN_ATOMIC_HELPERS(fetch_umax)
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GEN_ATOMIC_HELPERS(add_fetch)
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GEN_ATOMIC_HELPERS(and_fetch)
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GEN_ATOMIC_HELPERS(or_fetch)
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GEN_ATOMIC_HELPERS(xor_fetch)
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GEN_ATOMIC_HELPERS(smin_fetch)
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GEN_ATOMIC_HELPERS(umin_fetch)
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GEN_ATOMIC_HELPERS(smax_fetch)
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GEN_ATOMIC_HELPERS(umax_fetch)
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GEN_ATOMIC_HELPERS(xchg)
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#undef ATOMIC_HELPER
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#undef GEN_ATOMIC_HELPERS
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@ -2725,38 +2725,6 @@ void cpu_stq_le_data(CPUArchState *env, target_ulong ptr, uint64_t val)
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#include "atomic_template.h"
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#endif
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/* Second set of helpers are directly callable from TCG as helpers. */
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#undef EXTRA_ARGS
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#undef ATOMIC_NAME
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#undef ATOMIC_MMU_LOOKUP_RW
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#undef ATOMIC_MMU_LOOKUP_R
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#undef ATOMIC_MMU_LOOKUP_W
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#define EXTRA_ARGS , TCGMemOpIdx oi
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#define ATOMIC_NAME(X) HELPER(glue(glue(atomic_ ## X, SUFFIX), END))
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#define ATOMIC_MMU_LOOKUP_RW \
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atomic_mmu_lookup(env, addr, oi, DATA_SIZE, PAGE_READ | PAGE_WRITE, GETPC())
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#define ATOMIC_MMU_LOOKUP_R \
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atomic_mmu_lookup(env, addr, oi, DATA_SIZE, PAGE_READ, GETPC())
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#define ATOMIC_MMU_LOOKUP_W \
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atomic_mmu_lookup(env, addr, oi, DATA_SIZE, PAGE_WRITE, GETPC())
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#define DATA_SIZE 1
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#include "atomic_template.h"
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#define DATA_SIZE 2
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#include "atomic_template.h"
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#define DATA_SIZE 4
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#include "atomic_template.h"
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#ifdef CONFIG_ATOMIC64
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#define DATA_SIZE 8
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#include "atomic_template.h"
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#endif
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#undef ATOMIC_MMU_IDX
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/* Code access functions. */
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static uint64_t full_ldub_code(CPUArchState *env, target_ulong addr,
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@ -39,8 +39,6 @@ DEF_HELPER_FLAGS_1(exit_atomic, TCG_CALL_NO_WG, noreturn, env)
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DEF_HELPER_FLAGS_3(memset, TCG_CALL_NO_RWG, ptr, ptr, int, ptr)
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#endif /* IN_HELPER_PROTO */
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#ifdef CONFIG_SOFTMMU
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DEF_HELPER_FLAGS_5(atomic_cmpxchgb, TCG_CALL_NO_WG,
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i32, env, tl, i32, i32, i32)
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DEF_HELPER_FLAGS_5(atomic_cmpxchgw_be, TCG_CALL_NO_WG,
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@ -88,50 +86,6 @@ DEF_HELPER_FLAGS_5(atomic_cmpxchgq_le, TCG_CALL_NO_WG,
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TCG_CALL_NO_WG, i32, env, tl, i32, i32)
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#endif /* CONFIG_ATOMIC64 */
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#else
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DEF_HELPER_FLAGS_4(atomic_cmpxchgb, TCG_CALL_NO_WG, i32, env, tl, i32, i32)
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DEF_HELPER_FLAGS_4(atomic_cmpxchgw_be, TCG_CALL_NO_WG, i32, env, tl, i32, i32)
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DEF_HELPER_FLAGS_4(atomic_cmpxchgw_le, TCG_CALL_NO_WG, i32, env, tl, i32, i32)
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DEF_HELPER_FLAGS_4(atomic_cmpxchgl_be, TCG_CALL_NO_WG, i32, env, tl, i32, i32)
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DEF_HELPER_FLAGS_4(atomic_cmpxchgl_le, TCG_CALL_NO_WG, i32, env, tl, i32, i32)
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#ifdef CONFIG_ATOMIC64
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DEF_HELPER_FLAGS_4(atomic_cmpxchgq_be, TCG_CALL_NO_WG, i64, env, tl, i64, i64)
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DEF_HELPER_FLAGS_4(atomic_cmpxchgq_le, TCG_CALL_NO_WG, i64, env, tl, i64, i64)
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#endif
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#ifdef CONFIG_ATOMIC64
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#define GEN_ATOMIC_HELPERS(NAME) \
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DEF_HELPER_FLAGS_3(glue(glue(atomic_, NAME), b), \
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TCG_CALL_NO_WG, i32, env, tl, i32) \
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DEF_HELPER_FLAGS_3(glue(glue(atomic_, NAME), w_le), \
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TCG_CALL_NO_WG, i32, env, tl, i32) \
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DEF_HELPER_FLAGS_3(glue(glue(atomic_, NAME), w_be), \
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TCG_CALL_NO_WG, i32, env, tl, i32) \
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DEF_HELPER_FLAGS_3(glue(glue(atomic_, NAME), l_le), \
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TCG_CALL_NO_WG, i32, env, tl, i32) \
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DEF_HELPER_FLAGS_3(glue(glue(atomic_, NAME), l_be), \
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TCG_CALL_NO_WG, i32, env, tl, i32) \
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DEF_HELPER_FLAGS_3(glue(glue(atomic_, NAME), q_le), \
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TCG_CALL_NO_WG, i64, env, tl, i64) \
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DEF_HELPER_FLAGS_3(glue(glue(atomic_, NAME), q_be), \
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TCG_CALL_NO_WG, i64, env, tl, i64)
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#else
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#define GEN_ATOMIC_HELPERS(NAME) \
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DEF_HELPER_FLAGS_3(glue(glue(atomic_, NAME), b), \
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TCG_CALL_NO_WG, i32, env, tl, i32) \
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DEF_HELPER_FLAGS_3(glue(glue(atomic_, NAME), w_le), \
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TCG_CALL_NO_WG, i32, env, tl, i32) \
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DEF_HELPER_FLAGS_3(glue(glue(atomic_, NAME), w_be), \
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TCG_CALL_NO_WG, i32, env, tl, i32) \
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DEF_HELPER_FLAGS_3(glue(glue(atomic_, NAME), l_le), \
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TCG_CALL_NO_WG, i32, env, tl, i32) \
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DEF_HELPER_FLAGS_3(glue(glue(atomic_, NAME), l_be), \
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TCG_CALL_NO_WG, i32, env, tl, i32)
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#endif /* CONFIG_ATOMIC64 */
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#endif /* CONFIG_SOFTMMU */
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GEN_ATOMIC_HELPERS(fetch_add)
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GEN_ATOMIC_HELPERS(fetch_and)
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GEN_ATOMIC_HELPERS(fetch_or)
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@ -1269,29 +1269,3 @@ static void *atomic_mmu_lookup(CPUArchState *env, target_ulong addr,
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#define DATA_SIZE 16
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#include "atomic_template.h"
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#endif
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/*
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* Second set of functions is directly callable from TCG.
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*/
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#undef EXTRA_ARGS
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#undef ATOMIC_NAME
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#undef ATOMIC_MMU_DECLS
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#define ATOMIC_NAME(X) HELPER(glue(glue(atomic_ ## X, SUFFIX), END))
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#define EXTRA_ARGS
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#define ATOMIC_MMU_DECLS uintptr_t retaddr = GETPC()
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#define DATA_SIZE 1
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#include "atomic_template.h"
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#define DATA_SIZE 2
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#include "atomic_template.h"
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#define DATA_SIZE 4
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#include "atomic_template.h"
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#ifdef CONFIG_ATOMIC64
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#define DATA_SIZE 8
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#include "atomic_template.h"
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#endif
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51
tcg/tcg-op.c
51
tcg/tcg-op.c
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@ -3084,7 +3084,6 @@ static void tcg_gen_ext_i64(TCGv_i64 ret, TCGv_i64 val, MemOp opc)
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}
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}
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#ifdef CONFIG_SOFTMMU
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typedef void (*gen_atomic_cx_i32)(TCGv_i32, TCGv_env, TCGv,
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TCGv_i32, TCGv_i32, TCGv_i32);
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typedef void (*gen_atomic_cx_i64)(TCGv_i64, TCGv_env, TCGv,
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@ -3093,12 +3092,6 @@ typedef void (*gen_atomic_op_i32)(TCGv_i32, TCGv_env, TCGv,
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TCGv_i32, TCGv_i32);
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typedef void (*gen_atomic_op_i64)(TCGv_i64, TCGv_env, TCGv,
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TCGv_i64, TCGv_i32);
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#else
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typedef void (*gen_atomic_cx_i32)(TCGv_i32, TCGv_env, TCGv, TCGv_i32, TCGv_i32);
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typedef void (*gen_atomic_cx_i64)(TCGv_i64, TCGv_env, TCGv, TCGv_i64, TCGv_i64);
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typedef void (*gen_atomic_op_i32)(TCGv_i32, TCGv_env, TCGv, TCGv_i32);
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typedef void (*gen_atomic_op_i64)(TCGv_i64, TCGv_env, TCGv, TCGv_i64);
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#endif
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#ifdef CONFIG_ATOMIC64
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# define WITH_ATOMIC64(X) X,
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@ -3140,18 +3133,13 @@ void tcg_gen_atomic_cmpxchg_i32(TCGv_i32 retv, TCGv addr, TCGv_i32 cmpv,
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tcg_temp_free_i32(t1);
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} else {
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gen_atomic_cx_i32 gen;
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TCGMemOpIdx oi;
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gen = table_cmpxchg[memop & (MO_SIZE | MO_BSWAP)];
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tcg_debug_assert(gen != NULL);
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#ifdef CONFIG_SOFTMMU
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{
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TCGMemOpIdx oi = make_memop_idx(memop & ~MO_SIGN, idx);
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gen(retv, cpu_env, addr, cmpv, newv, tcg_constant_i32(oi));
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}
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#else
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gen(retv, cpu_env, addr, cmpv, newv);
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#endif
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oi = make_memop_idx(memop & ~MO_SIGN, idx);
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gen(retv, cpu_env, addr, cmpv, newv, tcg_constant_i32(oi));
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if (memop & MO_SIGN) {
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tcg_gen_ext_i32(retv, retv, memop);
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@ -3184,18 +3172,13 @@ void tcg_gen_atomic_cmpxchg_i64(TCGv_i64 retv, TCGv addr, TCGv_i64 cmpv,
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} else if ((memop & MO_SIZE) == MO_64) {
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#ifdef CONFIG_ATOMIC64
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gen_atomic_cx_i64 gen;
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TCGMemOpIdx oi;
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gen = table_cmpxchg[memop & (MO_SIZE | MO_BSWAP)];
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tcg_debug_assert(gen != NULL);
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#ifdef CONFIG_SOFTMMU
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{
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TCGMemOpIdx oi = make_memop_idx(memop, idx);
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gen(retv, cpu_env, addr, cmpv, newv, tcg_constant_i32(oi));
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}
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#else
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gen(retv, cpu_env, addr, cmpv, newv);
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#endif
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oi = make_memop_idx(memop, idx);
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gen(retv, cpu_env, addr, cmpv, newv, tcg_constant_i32(oi));
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#else
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gen_helper_exit_atomic(cpu_env);
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/* Produce a result, so that we have a well-formed opcode stream
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@ -3245,20 +3228,15 @@ static void do_atomic_op_i32(TCGv_i32 ret, TCGv addr, TCGv_i32 val,
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TCGArg idx, MemOp memop, void * const table[])
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{
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gen_atomic_op_i32 gen;
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TCGMemOpIdx oi;
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memop = tcg_canonicalize_memop(memop, 0, 0);
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gen = table[memop & (MO_SIZE | MO_BSWAP)];
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tcg_debug_assert(gen != NULL);
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#ifdef CONFIG_SOFTMMU
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{
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TCGMemOpIdx oi = make_memop_idx(memop & ~MO_SIGN, idx);
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gen(ret, cpu_env, addr, val, tcg_constant_i32(oi));
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}
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#else
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gen(ret, cpu_env, addr, val);
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#endif
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oi = make_memop_idx(memop & ~MO_SIGN, idx);
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gen(ret, cpu_env, addr, val, tcg_constant_i32(oi));
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if (memop & MO_SIGN) {
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tcg_gen_ext_i32(ret, ret, memop);
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@ -3292,18 +3270,13 @@ static void do_atomic_op_i64(TCGv_i64 ret, TCGv addr, TCGv_i64 val,
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if ((memop & MO_SIZE) == MO_64) {
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#ifdef CONFIG_ATOMIC64
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gen_atomic_op_i64 gen;
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TCGMemOpIdx oi;
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gen = table[memop & (MO_SIZE | MO_BSWAP)];
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tcg_debug_assert(gen != NULL);
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#ifdef CONFIG_SOFTMMU
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{
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TCGMemOpIdx oi = make_memop_idx(memop & ~MO_SIGN, idx);
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gen(ret, cpu_env, addr, val, tcg_constant_i32(oi));
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}
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#else
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gen(ret, cpu_env, addr, val);
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#endif
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oi = make_memop_idx(memop & ~MO_SIGN, idx);
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gen(ret, cpu_env, addr, val, tcg_constant_i32(oi));
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#else
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gen_helper_exit_atomic(cpu_env);
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/* Produce a result, so that we have a well-formed opcode stream
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