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target-arm: Fix lpae bit in FSR on an alignment fault
If an alignment fault occurred and target EL is using AArch32, then DFSR/IFSR bit LPAE[9] must be set correctly. Signed-off-by: Sergey Sorokin <afarallax@yandex.ru> Message-id: 1471283293-169850-1-git-send-email-afarallax@yandex.ru Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -194,7 +194,7 @@ void arm_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr,
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* the LPAE long descriptor format, or the short descriptor format
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*/
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if (arm_s1_regime_using_lpae_format(env, cpu_mmu_index(env, false))) {
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env->exception.fsr = 0x21;
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env->exception.fsr = (1 << 9) | 0x21;
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} else {
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env->exception.fsr = 0x1;
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}
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