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hw/arm/smmuv3: Advertise SMMUv3.2 range invalidation

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Expose the RIL bit so that the guest driver uses range
invalidation. Although RIL is a 3.2 features, We let
the AIDR advertise SMMUv3.1 support as v3.x implementation
is allowed to implement features from v3.(x+1).

Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20200728150815.11446-12-eric.auger@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Eric Auger 2020-07-28 17:08:15 +02:00 committed by Peter Maydell
parent e7c3b9d9a0
commit de206dfd80
2 changed files with 2 additions and 0 deletions
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1
hw/arm/smmuv3-internal.h
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@ -55,6 +55,7 @@ REG32(IDR1, 0x4)
REG32(IDR2, 0x8)
REG32(IDR3, 0xc)
FIELD(IDR3, HAD, 2, 1);
FIELD(IDR3, RIL, 10, 1);
REG32(IDR4, 0x10)
REG32(IDR5, 0x14)
FIELD(IDR5, OAS, 0, 3);

1
hw/arm/smmuv3.c
View file

@ -254,6 +254,7 @@ static void smmuv3_init_regs(SMMUv3State *s)
s->idr[1] = FIELD_DP32(s->idr[1], IDR1, EVENTQS, SMMU_EVENTQS);
s->idr[1] = FIELD_DP32(s->idr[1], IDR1, CMDQS, SMMU_CMDQS);
s->idr[3] = FIELD_DP32(s->idr[3], IDR3, RIL, 1);
s->idr[3] = FIELD_DP32(s->idr[3], IDR3, HAD, 1);
/* 4K and 64K granule support */