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sun4m: Add FCode ROM for TCX framebuffer

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Upstream OpenBIOS now implements SBus probing in order to determine the
contents of a physical bus slot, which is required to allow OpenBIOS to
identify the framebuffer without help from the fw_cfg interface.

SBus probing works by detecting the presence of an FCode program
(effectively tokenised Forth) at the base address of each slot, and if
present executes it so that it creates its own device node in the
OpenBIOS device tree.

The FCode ROM is generated as part of the OpenBIOS build and should
generally be updated at the same time.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
CC: Blue Swirl <blauwirbel@gmail.com>
CC: Bob Breuer <breuerr@mc.net>
CC: Artyom Tarasenko <atar4qemu@gmail.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Mark Cave-Ayland 2013-11-02 16:03:50 +00:00 committed by Paolo Bonzini
parent 394cfa39ba
commit da87dd7bd7
5 changed files with 38 additions and 11 deletions
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2
Makefile
View file

@ -293,7 +293,7 @@ ifdef INSTALL_BLOBS
BLOBS=bios.bin sgabios.bin vgabios.bin vgabios-cirrus.bin \
vgabios-stdvga.bin vgabios-vmware.bin vgabios-qxl.bin \
acpi-dsdt.aml q35-acpi-dsdt.aml \
ppc_rom.bin openbios-sparc32 openbios-sparc64 openbios-ppc \
ppc_rom.bin openbios-sparc32 openbios-sparc64 openbios-ppc QEMU,tcx.bin \
pxe-e1000.rom pxe-eepro100.rom pxe-ne2k_pci.rom \
pxe-pcnet.rom pxe-rtl8139.rom pxe-virtio.rom \
efi-e1000.rom efi-eepro100.rom efi-ne2k_pci.rom \

26
hw/display/tcx.c
View file

@ -25,8 +25,12 @@
#include "qemu-common.h"
#include "ui/console.h"
#include "ui/pixel_ops.h"
#include "hw/loader.h"
#include "hw/sysbus.h"
#define TCX_ROM_FILE "QEMU,tcx.bin"
#define FCODE_MAX_ROM_SIZE 0x10000
#define MAXX 1024
#define MAXY 768
#define TCX_DAC_NREGS 16
@ -43,6 +47,8 @@ typedef struct TCXState {
QemuConsole *con;
uint8_t *vram;
uint32_t *vram24, *cplane;
hwaddr prom_addr;
MemoryRegion rom;
MemoryRegion vram_mem;
MemoryRegion vram_8bit;
MemoryRegion vram_24bit;
@ -529,14 +535,31 @@ static int tcx_init1(SysBusDevice *dev)
{
TCXState *s = TCX(dev);
ram_addr_t vram_offset = 0;
int size;
int size, ret;
uint8_t *vram_base;
char *fcode_filename;
memory_region_init_ram(&s->vram_mem, OBJECT(s), "tcx.vram",
s->vram_size * (1 + 4 + 4));
vmstate_register_ram_global(&s->vram_mem);
vram_base = memory_region_get_ram_ptr(&s->vram_mem);
/* FCode ROM */
memory_region_init_ram(&s->rom, NULL, "tcx.prom", FCODE_MAX_ROM_SIZE);
vmstate_register_ram_global(&s->rom);
memory_region_set_readonly(&s->rom, true);
sysbus_init_mmio(dev, &s->rom);
fcode_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, TCX_ROM_FILE);
if (fcode_filename) {
ret = load_image_targphys(fcode_filename, s->prom_addr,
FCODE_MAX_ROM_SIZE);
if (ret < 0 || ret > FCODE_MAX_ROM_SIZE) {
fprintf(stderr, "tcx: could not load prom '%s'\n", TCX_ROM_FILE);
return -1;
}
}
/* 8-bit plane */
s->vram = vram_base;
size = s->vram_size;
@ -598,6 +621,7 @@ static Property tcx_properties[] = {
DEFINE_PROP_UINT16("width", TCXState, width, -1),
DEFINE_PROP_UINT16("height", TCXState, height, -1),
DEFINE_PROP_UINT16("depth", TCXState, depth, -1),
DEFINE_PROP_HEX64("prom_addr", TCXState, prom_addr, -1),
DEFINE_PROP_END_OF_LIST(),
};

17
hw/sparc/sun4m.c
View file

@ -537,24 +537,27 @@ static void tcx_init(hwaddr addr, int vram_size, int width,
qdev_prop_set_uint16(dev, "width", width);
qdev_prop_set_uint16(dev, "height", height);
qdev_prop_set_uint16(dev, "depth", depth);
qdev_prop_set_uint64(dev, "prom_addr", addr);
qdev_init_nofail(dev);
s = SYS_BUS_DEVICE(dev);
/* FCode ROM */
sysbus_mmio_map(s, 0, addr);
/* 8-bit plane */
sysbus_mmio_map(s, 0, addr + 0x00800000ULL);
sysbus_mmio_map(s, 1, addr + 0x00800000ULL);
/* DAC */
sysbus_mmio_map(s, 1, addr + 0x00200000ULL);
sysbus_mmio_map(s, 2, addr + 0x00200000ULL);
/* TEC (dummy) */
sysbus_mmio_map(s, 2, addr + 0x00700000ULL);
sysbus_mmio_map(s, 3, addr + 0x00700000ULL);
/* THC 24 bit: NetBSD writes here even with 8-bit display: dummy */
sysbus_mmio_map(s, 3, addr + 0x00301000ULL);
sysbus_mmio_map(s, 4, addr + 0x00301000ULL);
if (depth == 24) {
/* 24-bit plane */
sysbus_mmio_map(s, 4, addr + 0x02000000ULL);
sysbus_mmio_map(s, 5, addr + 0x02000000ULL);
/* Control plane */
sysbus_mmio_map(s, 5, addr + 0x0a000000ULL);
sysbus_mmio_map(s, 6, addr + 0x0a000000ULL);
} else {
/* THC 8 bit (dummy) */
sysbus_mmio_map(s, 4, addr + 0x00300000ULL);
sysbus_mmio_map(s, 5, addr + 0x00300000ULL);
}
}

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pc-bios/QEMU,tcx.bin Normal file
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4
pc-bios/README
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@ -11,8 +11,8 @@
firmware implementation. The goal is to implement a 100% IEEE
1275-1994 (referred to as Open Firmware) compliant firmware.
The included images for PowerPC (for 32 and 64 bit PPC CPUs),
Sparc32 and Sparc64 are built from OpenBIOS SVN revision
1229.
Sparc32 (including QEMU,tcx.bin) and Sparc64 are built from OpenBIOS SVN
revision 1229.
- SLOF (Slimline Open Firmware) is a free IEEE 1275 Open Firmware
implementation for certain IBM POWER hardware. The sources are at