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QOM/QTest infrastructure fixes and device conversions

Browse Source 
* qom-test extension
 * QEMUMachineInitArgs conversion to MachineState
 * -machine options turned into /machine properties
 * Named GPIO IRQs for devices
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Merge remote-tracking branch 'remotes/afaerber/tags/qom-devices-for-peter' into staging

QOM/QTest infrastructure fixes and device conversions

* qom-test extension
* QEMUMachineInitArgs conversion to MachineState
* -machine options turned into /machine properties
* Named GPIO IRQs for devices

# gpg: Signature made Wed 28 May 2014 18:24:04 BST using RSA key ID 3E7E013F
# gpg: Can't check signature: public key not found

* remotes/afaerber/tags/qom-devices-for-peter:
  ssi: Name the CS GPIO
  qdev: Implement named GPIOs
  machine: Make -machine opts properties of MachineState
  tests: Check empty QMP output visitor
  qapi: Avoid output visitor crashing if it encounters a NULL value
  vl.c: Do not set 'type' property in obj_set_property()
  machine: Conversion of QEMUMachineInitArgs to MachineState
  qom-test: Test qom-list on link<> properties

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2014-05-28 18:38:38 +01:00
commit d7d3d6092c
75 changed files with 990 additions and 585 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
hw/alpha/dp264.c
View File

@ -43,13 +43,13 @@ static int clipper_pci_map_irq(PCIDevice *d, int irq_num)
return (slot + 1) * 4 + irq_num;
}
static void clipper_init(QEMUMachineInitArgs *args)
static void clipper_init(MachineState *machine)
{
ram_addr_t ram_size = args->ram_size;
const char *cpu_model = args->cpu_model;
const char *kernel_filename = args->kernel_filename;
const char *kernel_cmdline = args->kernel_cmdline;
const char *initrd_filename = args->initrd_filename;
ram_addr_t ram_size = machine->ram_size;
const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
const char *kernel_cmdline = machine->kernel_cmdline;
const char *initrd_filename = machine->initrd_filename;
AlphaCPU *cpus[4];
PCIBus *pci_bus;
ISABus *isa_bus;

10
hw/arm/collie.c
View File

@ -23,12 +23,12 @@ static struct arm_boot_info collie_binfo = {
.ram_size = 0x20000000,
};
static void collie_init(QEMUMachineInitArgs *args)
static void collie_init(MachineState *machine)
{
const char *cpu_model = args->cpu_model;
const char *kernel_filename = args->kernel_filename;
const char *kernel_cmdline = args->kernel_cmdline;
const char *initrd_filename = args->initrd_filename;
const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
const char *kernel_cmdline = machine->kernel_cmdline;
const char *initrd_filename = machine->initrd_filename;
StrongARMState *s;
DriveInfo *dinfo;
MemoryRegion *sysmem = get_system_memory();

11
hw/arm/cubieboard.c
View File

@ -30,7 +30,7 @@ typedef struct CubieBoardState {
MemoryRegion sdram;
} CubieBoardState;
static void cubieboard_init(QEMUMachineInitArgs *args)
static void cubieboard_init(MachineState *machine)
{
CubieBoardState *s = g_new(CubieBoardState, 1);
Error *err = NULL;
@ -63,14 +63,15 @@ static void cubieboard_init(QEMUMachineInitArgs *args)
exit(1);
}
memory_region_init_ram(&s->sdram, NULL, "cubieboard.ram", args->ram_size);
memory_region_init_ram(&s->sdram, NULL, "cubieboard.ram",
machine->ram_size);
vmstate_register_ram_global(&s->sdram);
memory_region_add_subregion(get_system_memory(), AW_A10_SDRAM_BASE,
&s->sdram);
cubieboard_binfo.ram_size = args->ram_size;
cubieboard_binfo.kernel_filename = args->kernel_filename;
cubieboard_binfo.kernel_cmdline = args->kernel_cmdline;
cubieboard_binfo.ram_size = machine->ram_size;
cubieboard_binfo.kernel_filename = machine->kernel_filename;
cubieboard_binfo.kernel_cmdline = machine->kernel_cmdline;
arm_load_kernel(&s->a10->cpu, &cubieboard_binfo);
}

2
hw/arm/digic_boards.c
View File

@ -143,7 +143,7 @@ static DigicBoard digic4_board_canon_a1100 = {
.rom1_def_filename = "canon-a1100-rom1.bin",
};
static void canon_a1100_init(QEMUMachineInitArgs *args)
static void canon_a1100_init(MachineState *machine)
{
digic4_board_init(&digic4_board_canon_a1100);
}

22
hw/arm/exynos4_boards.c
View File

@ -94,7 +94,7 @@ static void lan9215_init(uint32_t base, qemu_irq irq)
}
}
static Exynos4210State *exynos4_boards_init_common(QEMUMachineInitArgs *args,
static Exynos4210State *exynos4_boards_init_common(MachineState *machine,
Exynos4BoardType board_type)
{
if (smp_cpus != EXYNOS4210_NCPUS && !qtest_enabled()) {
@ -108,9 +108,9 @@ static Exynos4210State *exynos4_boards_init_common(QEMUMachineInitArgs *args,
exynos4_board_binfo.board_id = exynos4_board_id[board_type];
exynos4_board_binfo.smp_bootreg_addr =
exynos4_board_smp_bootreg_addr[board_type];
exynos4_board_binfo.kernel_filename = args->kernel_filename;
exynos4_board_binfo.initrd_filename = args->initrd_filename;
exynos4_board_binfo.kernel_cmdline = args->kernel_cmdline;
exynos4_board_binfo.kernel_filename = machine->kernel_filename;
exynos4_board_binfo.initrd_filename = machine->initrd_filename;
exynos4_board_binfo.kernel_cmdline = machine->kernel_cmdline;
exynos4_board_binfo.gic_cpu_if_addr =
EXYNOS4210_SMP_PRIVATE_BASE_ADDR + 0x100;
@ -120,24 +120,24 @@ static Exynos4210State *exynos4_boards_init_common(QEMUMachineInitArgs *args,
" initrd_filename: %s\n",
exynos4_board_ram_size[board_type] / 1048576,
exynos4_board_ram_size[board_type],
args->kernel_filename,
args->kernel_cmdline,
args->initrd_filename);
machine->kernel_filename,
machine->kernel_cmdline,
machine->initrd_filename);
return exynos4210_init(get_system_memory(),
exynos4_board_ram_size[board_type]);
}
static void nuri_init(QEMUMachineInitArgs *args)
static void nuri_init(MachineState *machine)
{
exynos4_boards_init_common(args, EXYNOS4_BOARD_NURI);
exynos4_boards_init_common(machine, EXYNOS4_BOARD_NURI);
arm_load_kernel(ARM_CPU(first_cpu), &exynos4_board_binfo);
}
static void smdkc210_init(QEMUMachineInitArgs *args)
static void smdkc210_init(MachineState *machine)
{
Exynos4210State *s = exynos4_boards_init_common(args,
Exynos4210State *s = exynos4_boards_init_common(machine,
EXYNOS4_BOARD_SMDKC210);
lan9215_init(SMDK_LAN9118_BASE_ADDR,

6
hw/arm/gumstix.c
View File

@ -46,7 +46,7 @@
static const int sector_len = 128 * 1024;
static void connex_init(QEMUMachineInitArgs *args)
static void connex_init(MachineState *machine)
{
PXA2xxState *cpu;
DriveInfo *dinfo;
@ -83,9 +83,9 @@ static void connex_init(QEMUMachineInitArgs *args)
qdev_get_gpio_in(cpu->gpio, 36));
}
static void verdex_init(QEMUMachineInitArgs *args)
static void verdex_init(MachineState *machine)
{
const char *cpu_model = args->cpu_model;
const char *cpu_model = machine->cpu_model;
PXA2xxState *cpu;
DriveInfo *dinfo;
int be;

24
hw/arm/highbank.c
View File

@ -199,13 +199,13 @@ enum cxmachines {
* 32-bit host, set the reg value of memory to 0xf7ff00000 in the
* device tree and pass -m 2047 to QEMU.
*/
static void calxeda_init(QEMUMachineInitArgs *args, enum cxmachines machine)
static void calxeda_init(MachineState *machine, enum cxmachines machine_id)
{
ram_addr_t ram_size = args->ram_size;
const char *cpu_model = args->cpu_model;
const char *kernel_filename = args->kernel_filename;
const char *kernel_cmdline = args->kernel_cmdline;
const char *initrd_filename = args->initrd_filename;
ram_addr_t ram_size = machine->ram_size;
const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
const char *kernel_cmdline = machine->kernel_cmdline;
const char *initrd_filename = machine->initrd_filename;
DeviceState *dev = NULL;
SysBusDevice *busdev;
qemu_irq pic[128];
@ -217,7 +217,7 @@ static void calxeda_init(QEMUMachineInitArgs *args, enum cxmachines machine)
char *sysboot_filename;
if (!cpu_model) {
switch (machine) {
switch (machine_id) {
case CALXEDA_HIGHBANK:
cpu_model = "cortex-a9";
break;
@ -274,7 +274,7 @@ static void calxeda_init(QEMUMachineInitArgs *args, enum cxmachines machine)
}
}
switch (machine) {
switch (machine_id) {
case CALXEDA_HIGHBANK:
dev = qdev_create(NULL, "l2x0");
qdev_init_nofail(dev);
@ -359,14 +359,14 @@ static void calxeda_init(QEMUMachineInitArgs *args, enum cxmachines machine)
arm_load_kernel(ARM_CPU(first_cpu), &highbank_binfo);
}
static void highbank_init(QEMUMachineInitArgs *args)
static void highbank_init(MachineState *machine)
{
calxeda_init(args, CALXEDA_HIGHBANK);
calxeda_init(machine, CALXEDA_HIGHBANK);
}
static void midway_init(QEMUMachineInitArgs *args)
static void midway_init(MachineState *machine)
{
calxeda_init(args, CALXEDA_MIDWAY);
calxeda_init(machine, CALXEDA_MIDWAY);
}
static QEMUMachine highbank_machine = {

12
hw/arm/integratorcp.c
View File

@ -461,13 +461,13 @@ static struct arm_boot_info integrator_binfo = {
.board_id = 0x113,
};
static void integratorcp_init(QEMUMachineInitArgs *args)
static void integratorcp_init(MachineState *machine)
{
ram_addr_t ram_size = args->ram_size;
const char *cpu_model = args->cpu_model;
const char *kernel_filename = args->kernel_filename;
const char *kernel_cmdline = args->kernel_cmdline;
const char *initrd_filename = args->initrd_filename;
ram_addr_t ram_size = machine->ram_size;
const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
const char *kernel_cmdline = machine->kernel_cmdline;
const char *initrd_filename = machine->initrd_filename;
ARMCPU *cpu;
MemoryRegion *address_space_mem = get_system_memory();
MemoryRegion *ram = g_new(MemoryRegion, 1);

12
hw/arm/kzm.c
View File

@ -70,13 +70,13 @@ static struct arm_boot_info kzm_binfo = {
.board_id = 1722,
};
static void kzm_init(QEMUMachineInitArgs *args)
static void kzm_init(MachineState *machine)
{
ram_addr_t ram_size = args->ram_size;
const char *cpu_model = args->cpu_model;
const char *kernel_filename = args->kernel_filename;
const char *kernel_cmdline = args->kernel_cmdline;
const char *initrd_filename = args->initrd_filename;
ram_addr_t ram_size = machine->ram_size;
const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
const char *kernel_cmdline = machine->kernel_cmdline;
const char *initrd_filename = machine->initrd_filename;
ARMCPU *cpu;
MemoryRegion *address_space_mem = get_system_memory();
MemoryRegion *ram = g_new(MemoryRegion, 1);

14
hw/arm/mainstone.c
View File

@ -105,7 +105,7 @@ static struct arm_boot_info mainstone_binfo = {
};
static void mainstone_common_init(MemoryRegion *address_space_mem,
QEMUMachineInitArgs *args,
MachineState *machine,
enum mainstone_model_e model, int arm_id)
{
uint32_t sector_len = 256 * 1024;
@ -116,7 +116,7 @@ static void mainstone_common_init(MemoryRegion *address_space_mem,
int i;
int be;
MemoryRegion *rom = g_new(MemoryRegion, 1);
const char *cpu_model = args->cpu_model;
const char *cpu_model = machine->cpu_model;
if (!cpu_model)
cpu_model = "pxa270-c5";
@ -175,16 +175,16 @@ static void mainstone_common_init(MemoryRegion *address_space_mem,
smc91c111_init(&nd_table[0], MST_ETH_PHYS,
qdev_get_gpio_in(mst_irq, ETHERNET_IRQ));
mainstone_binfo.kernel_filename = args->kernel_filename;
mainstone_binfo.kernel_cmdline = args->kernel_cmdline;
mainstone_binfo.initrd_filename = args->initrd_filename;
mainstone_binfo.kernel_filename = machine->kernel_filename;
mainstone_binfo.kernel_cmdline = machine->kernel_cmdline;
mainstone_binfo.initrd_filename = machine->initrd_filename;
mainstone_binfo.board_id = arm_id;
arm_load_kernel(mpu->cpu, &mainstone_binfo);
}
static void mainstone_init(QEMUMachineInitArgs *args)
static void mainstone_init(MachineState *machine)
{
mainstone_common_init(get_system_memory(), args, mainstone, 0x196);
mainstone_common_init(get_system_memory(), machine, mainstone, 0x196);
}
static QEMUMachine mainstone2_machine = {

10
hw/arm/musicpal.c
View File

@ -1569,12 +1569,12 @@ static struct arm_boot_info musicpal_binfo = {
.board_id = 0x20e,
};
static void musicpal_init(QEMUMachineInitArgs *args)
static void musicpal_init(MachineState *machine)
{
const char *cpu_model = args->cpu_model;
const char *kernel_filename = args->kernel_filename;
const char *kernel_cmdline = args->kernel_cmdline;
const char *initrd_filename = args->initrd_filename;
const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
const char *kernel_cmdline = machine->kernel_cmdline;
const char *initrd_filename = machine->initrd_filename;
ARMCPU *cpu;
qemu_irq pic[32];
DeviceState *dev;

22
hw/arm/nseries.c
View File

@ -1278,14 +1278,14 @@ static int n810_atag_setup(const struct arm_boot_info *info, void *p)
return n8x0_atag_setup(p, 810);
}
static void n8x0_init(QEMUMachineInitArgs *args,
static void n8x0_init(MachineState *machine,
struct arm_boot_info *binfo, int model)
{
MemoryRegion *sysmem = get_system_memory();
struct n800_s *s = (struct n800_s *) g_malloc0(sizeof(*s));
int sdram_size = binfo->ram_size;
s->mpu = omap2420_mpu_init(sysmem, sdram_size, args->cpu_model);
s->mpu = omap2420_mpu_init(sysmem, sdram_size, machine->cpu_model);
/* Setup peripherals
*
@ -1329,18 +1329,18 @@ static void n8x0_init(QEMUMachineInitArgs *args,
n8x0_usb_setup(s);
}
if (args->kernel_filename) {
if (machine->kernel_filename) {
/* Or at the linux loader. */
binfo->kernel_filename = args->kernel_filename;
binfo->kernel_cmdline = args->kernel_cmdline;
binfo->initrd_filename = args->initrd_filename;
binfo->kernel_filename = machine->kernel_filename;
binfo->kernel_cmdline = machine->kernel_cmdline;
binfo->initrd_filename = machine->initrd_filename;
arm_load_kernel(s->mpu->cpu, binfo);
qemu_register_reset(n8x0_boot_init, s);
}
if (option_rom[0].name &&
(args->boot_order[0] == 'n' || !args->kernel_filename)) {
(machine->boot_order[0] == 'n' || !machine->kernel_filename)) {
uint8_t nolo_tags[0x10000];
/* No, wait, better start at the ROM. */
s->mpu->cpu->env.regs[15] = OMAP2_Q2_BASE + 0x400000;
@ -1382,14 +1382,14 @@ static struct arm_boot_info n810_binfo = {
.atag_board = n810_atag_setup,
};
static void n800_init(QEMUMachineInitArgs *args)
static void n800_init(MachineState *machine)
{
return n8x0_init(args, &n800_binfo, 800);
return n8x0_init(machine, &n800_binfo, 800);
}
static void n810_init(QEMUMachineInitArgs *args)
static void n810_init(MachineState *machine)
{
return n8x0_init(args, &n810_binfo, 810);
return n8x0_init(machine, &n810_binfo, 810);
}
static QEMUMachine n800_machine = {

21
hw/arm/omap_sx1.c
View File

@ -98,7 +98,7 @@ static struct arm_boot_info sx1_binfo = {
.board_id = 0x265,
};
static void sx1_init(QEMUMachineInitArgs *args, const int version)
static void sx1_init(MachineState *machine, const int version)
{
struct omap_mpu_state_s *mpu;
MemoryRegion *address_space = get_system_memory();
@ -118,7 +118,8 @@ static void sx1_init(QEMUMachineInitArgs *args, const int version)
flash_size = flash2_size;
}
mpu = omap310_mpu_init(address_space, sx1_binfo.ram_size, args->cpu_model);
mpu = omap310_mpu_init(address_space, sx1_binfo.ram_size,
machine->cpu_model);
/* External Flash (EMIFS) */
memory_region_init_ram(flash, NULL, "omap_sx1.flash0-0", flash_size);
@ -189,29 +190,29 @@ static void sx1_init(QEMUMachineInitArgs *args, const int version)
OMAP_CS1_BASE, &cs[1]);
}
if (!args->kernel_filename && !fl_idx && !qtest_enabled()) {
if (!machine->kernel_filename && !fl_idx && !qtest_enabled()) {
fprintf(stderr, "Kernel or Flash image must be specified\n");
exit(1);
}
/* Load the kernel. */
sx1_binfo.kernel_filename = args->kernel_filename;
sx1_binfo.kernel_cmdline = args->kernel_cmdline;
sx1_binfo.initrd_filename = args->initrd_filename;
sx1_binfo.kernel_filename = machine->kernel_filename;
sx1_binfo.kernel_cmdline = machine->kernel_cmdline;
sx1_binfo.initrd_filename = machine->initrd_filename;
arm_load_kernel(mpu->cpu, &sx1_binfo);
/* TODO: fix next line */
//~ qemu_console_resize(ds, 640, 480);
}
static void sx1_init_v1(QEMUMachineInitArgs *args)
static void sx1_init_v1(MachineState *machine)
{
sx1_init(args, 1);
sx1_init(machine, 1);
}
static void sx1_init_v2(QEMUMachineInitArgs *args)
static void sx1_init_v2(MachineState *machine)
{
sx1_init(args, 2);
sx1_init(machine, 2);
}
static QEMUMachine sx1_machine_v2 = {

10
hw/arm/palm.c
View File

@ -191,12 +191,12 @@ static struct arm_boot_info palmte_binfo = {
.board_id = 0x331,
};
static void palmte_init(QEMUMachineInitArgs *args)
static void palmte_init(MachineState *machine)
{
const char *cpu_model = args->cpu_model;
const char *kernel_filename = args->kernel_filename;
const char *kernel_cmdline = args->kernel_cmdline;
const char *initrd_filename = args->initrd_filename;
const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
const char *kernel_cmdline = machine->kernel_cmdline;
const char *initrd_filename = machine->initrd_filename;
MemoryRegion *address_space_mem = get_system_memory();
struct omap_mpu_state_s *mpu;
int flash_size = 0x00800000;

44
hw/arm/realview.c
View File

@ -45,7 +45,7 @@ static const int realview_board_id[] = {
0x76d
};
static void realview_init(QEMUMachineInitArgs *args,
static void realview_init(MachineState *machine,
enum realview_board_type board_type)
{
ARMCPU *cpu = NULL;
@ -71,7 +71,7 @@ static void realview_init(QEMUMachineInitArgs *args,
uint32_t proc_id = 0;
uint32_t sys_id;
ram_addr_t low_ram_size;
ram_addr_t ram_size = args->ram_size;
ram_addr_t ram_size = machine->ram_size;
hwaddr periphbase = 0;
switch (board_type) {
@ -91,7 +91,7 @@ static void realview_init(QEMUMachineInitArgs *args,
break;
}
cpu_oc = cpu_class_by_name(TYPE_ARM_CPU, args->cpu_model);
cpu_oc = cpu_class_by_name(TYPE_ARM_CPU, machine->cpu_model);
if (!cpu_oc) {
fprintf(stderr, "Unable to find CPU definition\n");
exit(1);
@ -342,45 +342,45 @@ static void realview_init(QEMUMachineInitArgs *args,
memory_region_add_subregion(sysmem, SMP_BOOT_ADDR, ram_hack);
realview_binfo.ram_size = ram_size;
realview_binfo.kernel_filename = args->kernel_filename;
realview_binfo.kernel_cmdline = args->kernel_cmdline;
realview_binfo.initrd_filename = args->initrd_filename;
realview_binfo.kernel_filename = machine->kernel_filename;
realview_binfo.kernel_cmdline = machine->kernel_cmdline;
realview_binfo.initrd_filename = machine->initrd_filename;
realview_binfo.nb_cpus = smp_cpus;
realview_binfo.board_id = realview_board_id[board_type];
realview_binfo.loader_start = (board_type == BOARD_PB_A8 ? 0x70000000 : 0);
arm_load_kernel(ARM_CPU(first_cpu), &realview_binfo);
}
static void realview_eb_init(QEMUMachineInitArgs *args)
static void realview_eb_init(MachineState *machine)
{
if (!args->cpu_model) {
args->cpu_model = "arm926";
if (!machine->cpu_model) {
machine->cpu_model = "arm926";
}
realview_init(args, BOARD_EB);
realview_init(machine, BOARD_EB);
}
static void realview_eb_mpcore_init(QEMUMachineInitArgs *args)
static void realview_eb_mpcore_init(MachineState *machine)
{
if (!args->cpu_model) {
args->cpu_model = "arm11mpcore";
if (!machine->cpu_model) {
machine->cpu_model = "arm11mpcore";
}
realview_init(args, BOARD_EB_MPCORE);
realview_init(machine, BOARD_EB_MPCORE);
}
static void realview_pb_a8_init(QEMUMachineInitArgs *args)
static void realview_pb_a8_init(MachineState *machine)
{
if (!args->cpu_model) {
args->cpu_model = "cortex-a8";
if (!machine->cpu_model) {
machine->cpu_model = "cortex-a8";
}
realview_init(args, BOARD_PB_A8);
realview_init(machine, BOARD_PB_A8);
}
static void realview_pbx_a9_init(QEMUMachineInitArgs *args)
static void realview_pbx_a9_init(MachineState *machine)
{
if (!args->cpu_model) {
args->cpu_model = "cortex-a9";
if (!machine->cpu_model) {
machine->cpu_model = "cortex-a9";
}
realview_init(args, BOARD_PBX_A9);
realview_init(machine, BOARD_PBX_A9);
}
static QEMUMachine realview_eb_machine = {

26
hw/arm/spitz.c
View File

@ -887,14 +887,14 @@ static struct arm_boot_info spitz_binfo = {
.ram_size = 0x04000000,
};
static void spitz_common_init(QEMUMachineInitArgs *args,
static void spitz_common_init(MachineState *machine,
enum spitz_model_e model, int arm_id)
{
PXA2xxState *mpu;
DeviceState *scp0, *scp1 = NULL;
MemoryRegion *address_space_mem = get_system_memory();
MemoryRegion *rom = g_new(MemoryRegion, 1);
const char *cpu_model = args->cpu_model;
const char *cpu_model = machine->cpu_model;
if (!cpu_model)
cpu_model = (model == terrier) ? "pxa270-c5" : "pxa270-c0";
@ -935,32 +935,32 @@ static void spitz_common_init(QEMUMachineInitArgs *args,
/* A 4.0 GB microdrive is permanently sitting in CF slot 0. */
spitz_microdrive_attach(mpu, 0);
spitz_binfo.kernel_filename = args->kernel_filename;
spitz_binfo.kernel_cmdline = args->kernel_cmdline;
spitz_binfo.initrd_filename = args->initrd_filename;
spitz_binfo.kernel_filename = machine->kernel_filename;
spitz_binfo.kernel_cmdline = machine->kernel_cmdline;
spitz_binfo.initrd_filename = machine->initrd_filename;
spitz_binfo.board_id = arm_id;
arm_load_kernel(mpu->cpu, &spitz_binfo);
sl_bootparam_write(SL_PXA_PARAM_BASE);
}
static void spitz_init(QEMUMachineInitArgs *args)
static void spitz_init(MachineState *machine)
{
spitz_common_init(args, spitz, 0x2c9);
spitz_common_init(machine, spitz, 0x2c9);
}
static void borzoi_init(QEMUMachineInitArgs *args)
static void borzoi_init(MachineState *machine)
{
spitz_common_init(args, borzoi, 0x33f);
spitz_common_init(machine, borzoi, 0x33f);
}
static void akita_init(QEMUMachineInitArgs *args)
static void akita_init(MachineState *machine)
{
spitz_common_init(args, akita, 0x2e8);
spitz_common_init(machine, akita, 0x2e8);
}
static void terrier_init(QEMUMachineInitArgs *args)
static void terrier_init(MachineState *machine)
{
spitz_common_init(args, terrier, 0x33f);
spitz_common_init(machine, terrier, 0x33f);
}
static QEMUMachine akitapda_machine = {

19
hw/arm/stellaris.c
View File

@ -1290,9 +1290,10 @@ static void stellaris_init(const char *kernel_filename, const char *cpu_model,
sddev = ssi_create_slave(bus, "ssi-sd");
ssddev = ssi_create_slave(bus, "ssd0323");
gpio_out[GPIO_D][0] = qemu_irq_split(qdev_get_gpio_in(sddev, 0),
qdev_get_gpio_in(ssddev, 0));
gpio_out[GPIO_C][7] = qdev_get_gpio_in(ssddev, 1);
gpio_out[GPIO_D][0] = qemu_irq_split(
qdev_get_gpio_in_named(sddev, SSI_GPIO_CS, 0),
qdev_get_gpio_in_named(ssddev, SSI_GPIO_CS, 0));
gpio_out[GPIO_C][7] = qdev_get_gpio_in(ssddev, 0);
/* Make sure the select pin is high. */
qemu_irq_raise(gpio_out[GPIO_D][0]);
@ -1333,17 +1334,17 @@ static void stellaris_init(const char *kernel_filename, const char *cpu_model,
}
/* FIXME: Figure out how to generate these from stellaris_boards. */
static void lm3s811evb_init(QEMUMachineInitArgs *args)
static void lm3s811evb_init(MachineState *machine)
{
const char *cpu_model = args->cpu_model;
const char *kernel_filename = args->kernel_filename;
const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
stellaris_init(kernel_filename, cpu_model, &stellaris_boards[0]);
}
static void lm3s6965evb_init(QEMUMachineInitArgs *args)
static void lm3s6965evb_init(MachineState *machine)
{
const char *cpu_model = args->cpu_model;
const char *kernel_filename = args->kernel_filename;
const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
stellaris_init(kernel_filename, cpu_model, &stellaris_boards[1]);
}

10
hw/arm/tosa.c
View File

@ -211,12 +211,12 @@ static struct arm_boot_info tosa_binfo = {
.ram_size = 0x04000000,
};
static void tosa_init(QEMUMachineInitArgs *args)
static void tosa_init(MachineState *machine)
{
const char *cpu_model = args->cpu_model;
const char *kernel_filename = args->kernel_filename;
const char *kernel_cmdline = args->kernel_cmdline;
const char *initrd_filename = args->initrd_filename;
const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
const char *kernel_cmdline = machine->kernel_cmdline;
const char *initrd_filename = machine->initrd_filename;
MemoryRegion *address_space_mem = get_system_memory();
MemoryRegion *rom = g_new(MemoryRegion, 1);
PXA2xxState *mpu;

26
hw/arm/versatilepb.c
View File

@ -173,7 +173,7 @@ static int vpb_sic_init(SysBusDevice *sbd)
static struct arm_boot_info versatile_binfo;
static void versatile_init(QEMUMachineInitArgs *args, int board_id)
static void versatile_init(MachineState *machine, int board_id)
{
ARMCPU *cpu;
MemoryRegion *sysmem = get_system_memory();
@ -190,15 +190,15 @@ static void versatile_init(QEMUMachineInitArgs *args, int board_id)
int done_smc = 0;
DriveInfo *dinfo;
if (!args->cpu_model) {
args->cpu_model = "arm926";
if (!machine->cpu_model) {
machine->cpu_model = "arm926";
}
cpu = cpu_arm_init(args->cpu_model);
cpu = cpu_arm_init(machine->cpu_model);
if (!cpu) {
fprintf(stderr, "Unable to find CPU definition\n");
exit(1);
}
memory_region_init_ram(ram, NULL, "versatile.ram", args->ram_size);
memory_region_init_ram(ram, NULL, "versatile.ram", machine->ram_size);
vmstate_register_ram_global(ram);
/* ??? RAM should repeat to fill physical memory space. */
/* SDRAM at address zero. */
@ -344,22 +344,22 @@ static void versatile_init(QEMUMachineInitArgs *args, int board_id)
fprintf(stderr, "qemu: Error registering flash memory.\n");
}
versatile_binfo.ram_size = args->ram_size;
versatile_binfo.kernel_filename = args->kernel_filename;
versatile_binfo.kernel_cmdline = args->kernel_cmdline;
versatile_binfo.initrd_filename = args->initrd_filename;
versatile_binfo.ram_size = machine->ram_size;
versatile_binfo.kernel_filename = machine->kernel_filename;
versatile_binfo.kernel_cmdline = machine->kernel_cmdline;
versatile_binfo.initrd_filename = machine->initrd_filename;
versatile_binfo.board_id = board_id;
arm_load_kernel(cpu, &versatile_binfo);
}
static void vpb_init(QEMUMachineInitArgs *args)
static void vpb_init(MachineState *machine)
{
versatile_init(args, 0x183);
versatile_init(machine, 0x183);
}
static void vab_init(QEMUMachineInitArgs *args)
static void vab_init(MachineState *machine)
{
versatile_init(args, 0x25e);
versatile_init(machine, 0x25e);
}
static QEMUMachine versatilepb_machine = {

21
hw/arm/vexpress.c
View File

@ -509,7 +509,7 @@ static pflash_t *ve_pflash_cfi01_register(hwaddr base, const char *name,
}
static void vexpress_common_init(VEDBoardInfo *daughterboard,
QEMUMachineInitArgs *args)
MachineState *machine)
{
DeviceState *dev, *sysctl, *pl041;
qemu_irq pic[64];
@ -525,7 +525,8 @@ static void vexpress_common_init(VEDBoardInfo *daughterboard,
const hwaddr *map = daughterboard->motherboard_map;
int i;
daughterboard->init(daughterboard, args->ram_size, args->cpu_model, pic);
daughterboard->init(daughterboard, machine->ram_size, machine->cpu_model,
pic);
/* Motherboard peripherals: the wiring is the same but the
* addresses vary between the legacy and A-Series memory maps.
@ -639,10 +640,10 @@ static void vexpress_common_init(VEDBoardInfo *daughterboard,
pic[40 + i]);
}
daughterboard->bootinfo.ram_size = args->ram_size;
daughterboard->bootinfo.kernel_filename = args->kernel_filename;
daughterboard->bootinfo.kernel_cmdline = args->kernel_cmdline;
daughterboard->bootinfo.initrd_filename = args->initrd_filename;
daughterboard->bootinfo.ram_size = machine->ram_size;
daughterboard->bootinfo.kernel_filename = machine->kernel_filename;
daughterboard->bootinfo.kernel_cmdline = machine->kernel_cmdline;
daughterboard->bootinfo.initrd_filename = machine->initrd_filename;
daughterboard->bootinfo.nb_cpus = smp_cpus;
daughterboard->bootinfo.board_id = VEXPRESS_BOARD_ID;
daughterboard->bootinfo.loader_start = daughterboard->loader_start;
@ -653,14 +654,14 @@ static void vexpress_common_init(VEDBoardInfo *daughterboard,
arm_load_kernel(ARM_CPU(first_cpu), &daughterboard->bootinfo);
}
static void vexpress_a9_init(QEMUMachineInitArgs *args)
static void vexpress_a9_init(MachineState *machine)
{
vexpress_common_init(&a9_daughterboard, args);
vexpress_common_init(&a9_daughterboard, machine);
}
static void vexpress_a15_init(QEMUMachineInitArgs *args)
static void vexpress_a15_init(MachineState *machine)
{
vexpress_common_init(&a15_daughterboard, args);
vexpress_common_init(&a15_daughterboard, machine);
}
static QEMUMachine vexpress_a9_machine = {

16
hw/arm/virt.c
View File

@ -383,13 +383,13 @@ static void *machvirt_dtb(const struct arm_boot_info *binfo, int *fdt_size)
return board->fdt;
}
static void machvirt_init(QEMUMachineInitArgs *args)
static void machvirt_init(MachineState *machine)
{
qemu_irq pic[NUM_IRQS];
MemoryRegion *sysmem = get_system_memory();
int n;
MemoryRegion *ram = g_new(MemoryRegion, 1);
const char *cpu_model = args->cpu_model;
const char *cpu_model = machine->cpu_model;
VirtBoardInfo *vbi;
if (!cpu_model) {
@ -415,7 +415,7 @@ static void machvirt_init(QEMUMachineInitArgs *args)
exit(1);
}
if (args->ram_size > vbi->memmap[VIRT_MEM].size) {
if (machine->ram_size > vbi->memmap[VIRT_MEM].size) {
error_report("mach-virt: cannot model more than 30GB RAM");
exit(1);
}
@ -447,7 +447,7 @@ static void machvirt_init(QEMUMachineInitArgs *args)
}
fdt_add_cpu_nodes(vbi);
memory_region_init_ram(ram, NULL, "mach-virt.ram", args->ram_size);
memory_region_init_ram(ram, NULL, "mach-virt.ram", machine->ram_size);
vmstate_register_ram_global(ram);
memory_region_add_subregion(sysmem, vbi->memmap[VIRT_MEM].base, ram);
@ -461,10 +461,10 @@ static void machvirt_init(QEMUMachineInitArgs *args)
*/
create_virtio_devices(vbi, pic);
vbi->bootinfo.ram_size = args->ram_size;
vbi->bootinfo.kernel_filename = args->kernel_filename;
vbi->bootinfo.kernel_cmdline = args->kernel_cmdline;
vbi->bootinfo.initrd_filename = args->initrd_filename;
vbi->bootinfo.ram_size = machine->ram_size;
vbi->bootinfo.kernel_filename = machine->kernel_filename;
vbi->bootinfo.kernel_cmdline = machine->kernel_cmdline;
vbi->bootinfo.initrd_filename = machine->initrd_filename;
vbi->bootinfo.nb_cpus = smp_cpus;
vbi->bootinfo.board_id = -1;
vbi->bootinfo.loader_start = vbi->memmap[VIRT_MEM].base;

14
hw/arm/xilinx_zynq.c
View File

@ -94,20 +94,20 @@ static inline void zynq_init_spi_flashes(uint32_t base_addr, qemu_irq irq,
for (j = 0; j < num_ss; ++j) {
flash_dev = ssi_create_slave(spi, "n25q128");
cs_line = qdev_get_gpio_in(flash_dev, 0);
cs_line = qdev_get_gpio_in_named(flash_dev, SSI_GPIO_CS, 0);
sysbus_connect_irq(busdev, i * num_ss + j + 1, cs_line);
}
}
}
static void zynq_init(QEMUMachineInitArgs *args)
static void zynq_init(MachineState *machine)
{
ram_addr_t ram_size = args->ram_size;
const char *cpu_model = args->cpu_model;
const char *kernel_filename = args->kernel_filename;
const char *kernel_cmdline = args->kernel_cmdline;
const char *initrd_filename = args->initrd_filename;
ram_addr_t ram_size = machine->ram_size;
const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
const char *kernel_cmdline = machine->kernel_cmdline;
const char *initrd_filename = machine->initrd_filename;
ObjectClass *cpu_oc;
ARMCPU *cpu;
MemoryRegion *address_space_mem = get_system_memory();

10
hw/arm/z2.c
View File

@ -300,12 +300,12 @@ static const TypeInfo aer915_info = {
.class_init = aer915_class_init,
};
static void z2_init(QEMUMachineInitArgs *args)
static void z2_init(MachineState *machine)
{
const char *cpu_model = args->cpu_model;
const char *kernel_filename = args->kernel_filename;
const char *kernel_cmdline = args->kernel_cmdline;
const char *initrd_filename = args->initrd_filename;
const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
const char *kernel_cmdline = machine->kernel_cmdline;
const char *initrd_filename = machine->initrd_filename;
MemoryRegion *address_space_mem = get_system_memory();
uint32_t sector_len = 0x10000;
PXA2xxState *mpu;

280
hw/core/machine.c
View File

@ -11,6 +11,284 @@
*/
#include "hw/boards.h"
#include "qapi/visitor.h"
static char *machine_get_accel(Object *obj, Error **errp)
{
MachineState *ms = MACHINE(obj);
return g_strdup(ms->accel);
}
static void machine_set_accel(Object *obj, const char *value, Error **errp)
{
MachineState *ms = MACHINE(obj);
ms->accel = g_strdup(value);
}
static bool machine_get_kernel_irqchip(Object *obj, Error **errp)
{
MachineState *ms = MACHINE(obj);
return ms->kernel_irqchip;
}
static void machine_set_kernel_irqchip(Object *obj, bool value, Error **errp)
{
MachineState *ms = MACHINE(obj);
ms->kernel_irqchip = value;
}
static void machine_get_kvm_shadow_mem(Object *obj, Visitor *v,
void *opaque, const char *name,
Error **errp)
{
MachineState *ms = MACHINE(obj);
int64_t value = ms->kvm_shadow_mem;
visit_type_int(v, &value, name, errp);
}
static void machine_set_kvm_shadow_mem(Object *obj, Visitor *v,
void *opaque, const char *name,
Error **errp)
{
MachineState *ms = MACHINE(obj);
Error *error = NULL;
int64_t value;
visit_type_int(v, &value, name, &error);
if (error) {
error_propagate(errp, error);
return;
}
ms->kvm_shadow_mem = value;
}
static char *machine_get_kernel(Object *obj, Error **errp)
{
MachineState *ms = MACHINE(obj);
return g_strdup(ms->kernel_filename);
}
static void machine_set_kernel(Object *obj, const char *value, Error **errp)
{
MachineState *ms = MACHINE(obj);
ms->kernel_filename = g_strdup(value);
}
static char *machine_get_initrd(Object *obj, Error **errp)
{
MachineState *ms = MACHINE(obj);
return g_strdup(ms->initrd_filename);
}
static void machine_set_initrd(Object *obj, const char *value, Error **errp)
{
MachineState *ms = MACHINE(obj);
ms->initrd_filename = g_strdup(value);
}
static char *machine_get_append(Object *obj, Error **errp)
{
MachineState *ms = MACHINE(obj);
return g_strdup(ms->kernel_cmdline);
}
static void machine_set_append(Object *obj, const char *value, Error **errp)
{
MachineState *ms = MACHINE(obj);
ms->kernel_cmdline = g_strdup(value);
}
static char *machine_get_dtb(Object *obj, Error **errp)
{
MachineState *ms = MACHINE(obj);
return g_strdup(ms->dtb);
}
static void machine_set_dtb(Object *obj, const char *value, Error **errp)
{
MachineState *ms = MACHINE(obj);
ms->dtb = g_strdup(value);
}
static char *machine_get_dumpdtb(Object *obj, Error **errp)
{
MachineState *ms = MACHINE(obj);
return g_strdup(ms->dumpdtb);
}
static void machine_set_dumpdtb(Object *obj, const char *value, Error **errp)
{
MachineState *ms = MACHINE(obj);
ms->dumpdtb = g_strdup(value);
}
static void machine_get_phandle_start(Object *obj, Visitor *v,
void *opaque, const char *name,
Error **errp)
{
MachineState *ms = MACHINE(obj);
int64_t value = ms->phandle_start;
visit_type_int(v, &value, name, errp);
}
static void machine_set_phandle_start(Object *obj, Visitor *v,
void *opaque, const char *name,
Error **errp)
{
MachineState *ms = MACHINE(obj);
Error *error = NULL;
int64_t value;
visit_type_int(v, &value, name, &error);
if (error) {
error_propagate(errp, error);
return;
}
ms->phandle_start = value;
}
static char *machine_get_dt_compatible(Object *obj, Error **errp)
{
MachineState *ms = MACHINE(obj);
return g_strdup(ms->dt_compatible);
}
static void machine_set_dt_compatible(Object *obj, const char *value, Error **errp)
{
MachineState *ms = MACHINE(obj);
ms->dt_compatible = g_strdup(value);
}
static bool machine_get_dump_guest_core(Object *obj, Error **errp)
{
MachineState *ms = MACHINE(obj);
return ms->dump_guest_core;
}
static void machine_set_dump_guest_core(Object *obj, bool value, Error **errp)
{
MachineState *ms = MACHINE(obj);
ms->dump_guest_core = value;
}
static bool machine_get_mem_merge(Object *obj, Error **errp)
{
MachineState *ms = MACHINE(obj);
return ms->mem_merge;
}
static void machine_set_mem_merge(Object *obj, bool value, Error **errp)
{
MachineState *ms = MACHINE(obj);
ms->mem_merge = value;
}
static bool machine_get_usb(Object *obj, Error **errp)
{
MachineState *ms = MACHINE(obj);
return ms->usb;
}
static void machine_set_usb(Object *obj, bool value, Error **errp)
{
MachineState *ms = MACHINE(obj);
ms->usb = value;
}
static char *machine_get_firmware(Object *obj, Error **errp)
{
MachineState *ms = MACHINE(obj);
return g_strdup(ms->firmware);
}
static void machine_set_firmware(Object *obj, const char *value, Error **errp)
{
MachineState *ms = MACHINE(obj);
ms->firmware = g_strdup(value);
}
static void machine_initfn(Object *obj)
{
object_property_add_str(obj, "accel",
machine_get_accel, machine_set_accel, NULL);
object_property_add_bool(obj, "kernel_irqchip",
machine_get_kernel_irqchip,
machine_set_kernel_irqchip,
NULL);
object_property_add(obj, "kvm_shadow_mem", "int",
machine_get_kvm_shadow_mem,
machine_set_kvm_shadow_mem,
NULL, NULL, NULL);
object_property_add_str(obj, "kernel",
machine_get_kernel, machine_set_kernel, NULL);
object_property_add_str(obj, "initrd",
machine_get_initrd, machine_set_initrd, NULL);
object_property_add_str(obj, "append",
machine_get_append, machine_set_append, NULL);
object_property_add_str(obj, "dtb",
machine_get_dtb, machine_set_dtb, NULL);
object_property_add_str(obj, "dumpdtb",
machine_get_dumpdtb, machine_set_dumpdtb, NULL);
object_property_add(obj, "phandle_start", "int",
machine_get_phandle_start,
machine_set_phandle_start,
NULL, NULL, NULL);
object_property_add_str(obj, "dt_compatible",
machine_get_dt_compatible,
machine_set_dt_compatible,
NULL);
object_property_add_bool(obj, "dump-guest-core",
machine_get_dump_guest_core,
machine_set_dump_guest_core,
NULL);
object_property_add_bool(obj, "mem-merge",
machine_get_mem_merge, machine_set_mem_merge, NULL);
object_property_add_bool(obj, "usb", machine_get_usb, machine_set_usb, NULL);
object_property_add_str(obj, "firmware",
machine_get_firmware, machine_set_firmware, NULL);
}
static void machine_finalize(Object *obj)
{
MachineState *ms = MACHINE(obj);
g_free(ms->accel);
g_free(ms->kernel_filename);
g_free(ms->initrd_filename);
g_free(ms->kernel_cmdline);
g_free(ms->dtb);
g_free(ms->dumpdtb);
g_free(ms->dt_compatible);
g_free(ms->firmware);
}
static const TypeInfo machine_info = {
.name = TYPE_MACHINE,
@ -18,6 +296,8 @@ static const TypeInfo machine_info = {
.abstract = true,
.class_size = sizeof(MachineClass),
.instance_size = sizeof(MachineState),
.instance_init = machine_initfn,
.instance_finalize = machine_finalize,
};
static void machine_register_types(void)

2
hw/core/null-machine.c
View File

@ -15,7 +15,7 @@
#include "hw/hw.h"
#include "hw/boards.h"
static void machine_none_init(QEMUMachineInitArgs *args)
static void machine_none_init(MachineState *machine)
{
}

85
hw/core/qdev.c
View File

@ -312,30 +312,82 @@ BusState *qdev_get_parent_bus(DeviceState *dev)
return dev->parent_bus;
}
static NamedGPIOList *qdev_get_named_gpio_list(DeviceState *dev,
const char *name)
{
NamedGPIOList *ngl;
QLIST_FOREACH(ngl, &dev->gpios, node) {
/* NULL is a valid and matchable name, otherwise do a normal
* strcmp match.
*/
if ((!ngl->name && !name) ||
(name && ngl->name && strcmp(name, ngl->name) == 0)) {
return ngl;
}
}
ngl = g_malloc0(sizeof(*ngl));
ngl->name = g_strdup(name);
QLIST_INSERT_HEAD(&dev->gpios, ngl, node);
return ngl;
}
void qdev_init_gpio_in_named(DeviceState *dev, qemu_irq_handler handler,
const char *name, int n)
{
NamedGPIOList *gpio_list = qdev_get_named_gpio_list(dev, name);
gpio_list->in = qemu_extend_irqs(gpio_list->in, gpio_list->num_in, handler,
dev, n);
gpio_list->num_in += n;
}
void qdev_init_gpio_in(DeviceState *dev, qemu_irq_handler handler, int n)
{
dev->gpio_in = qemu_extend_irqs(dev->gpio_in, dev->num_gpio_in, handler,
dev, n);
dev->num_gpio_in += n;
qdev_init_gpio_in_named(dev, handler, NULL, n);
}
void qdev_init_gpio_out_named(DeviceState *dev, qemu_irq *pins,
const char *name, int n)
{
NamedGPIOList *gpio_list = qdev_get_named_gpio_list(dev, name);
assert(gpio_list->num_out == 0);
gpio_list->num_out = n;
gpio_list->out = pins;
}
void qdev_init_gpio_out(DeviceState *dev, qemu_irq *pins, int n)
{
assert(dev->num_gpio_out == 0);
dev->num_gpio_out = n;
dev->gpio_out = pins;
qdev_init_gpio_out_named(dev, pins, NULL, n);
}
qemu_irq qdev_get_gpio_in_named(DeviceState *dev, const char *name, int n)
{
NamedGPIOList *gpio_list = qdev_get_named_gpio_list(dev, name);
assert(n >= 0 && n < gpio_list->num_in);
return gpio_list->in[n];
}
qemu_irq qdev_get_gpio_in(DeviceState *dev, int n)
{
assert(n >= 0 && n < dev->num_gpio_in);
return dev->gpio_in[n];
return qdev_get_gpio_in_named(dev, NULL, n);
}
void qdev_connect_gpio_out_named(DeviceState *dev, const char *name, int n,
qemu_irq pin)
{
NamedGPIOList *gpio_list = qdev_get_named_gpio_list(dev, name);
assert(n >= 0 && n < gpio_list->num_out);
gpio_list->out[n] = pin;
}
void qdev_connect_gpio_out(DeviceState * dev, int n, qemu_irq pin)
{
assert(n >= 0 && n < dev->num_gpio_out);
dev->gpio_out[n] = pin;
qdev_connect_gpio_out_named(dev, NULL, n, pin);
}
BusState *qdev_get_child_bus(DeviceState *dev, const char *name)
@ -844,6 +896,7 @@ static void device_initfn(Object *obj)
object_property_add_link(OBJECT(dev), "parent_bus", TYPE_BUS,
(Object **)&dev->parent_bus, NULL, 0,
&error_abort);
QLIST_INIT(&dev->gpios);
}
static void device_post_init(Object *obj)
@ -854,10 +907,22 @@ static void device_post_init(Object *obj)
/* Unlink device from bus and free the structure. */
static void device_finalize(Object *obj)
{
NamedGPIOList *ngl, *next;
DeviceState *dev = DEVICE(obj);
if (dev->opts) {
qemu_opts_del(dev->opts);
}
QLIST_FOREACH_SAFE(ngl, &dev->gpios, node, next) {
QLIST_REMOVE(ngl, node);
qemu_free_irqs(ngl->in);
g_free(ngl->name);
g_free(ngl);
/* ngl->out irqs are owned by the other end and should not be freed
* here
*/
}
}
static void device_class_base_init(ObjectClass *class, void *data)

10
hw/cris/axis_dev88.c
View File

@ -243,12 +243,12 @@ static const MemoryRegionOps gpio_ops = {
static struct cris_load_info li;
static
void axisdev88_init(QEMUMachineInitArgs *args)
void axisdev88_init(MachineState *machine)
{
ram_addr_t ram_size = args->ram_size;
const char *cpu_model = args->cpu_model;
const char *kernel_filename = args->kernel_filename;
const char *kernel_cmdline = args->kernel_cmdline;
ram_addr_t ram_size = machine->ram_size;
const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
const char *kernel_cmdline = machine->kernel_cmdline;
CRISCPU *cpu;
CPUCRISState *env;
DeviceState *dev;

109
hw/i386/pc_piix.c
View File

@ -69,7 +69,7 @@ static bool smbios_legacy_mode;
static bool gigabyte_align = true;
/* PC hardware initialisation */
static void pc_init1(QEMUMachineInitArgs *args,
static void pc_init1(MachineState *machine,
int pci_enabled,
int kvmclock_enabled)
{
@ -106,7 +106,7 @@ static void pc_init1(QEMUMachineInitArgs *args,
object_property_add_child(qdev_get_machine(), "icc-bridge",
OBJECT(icc_bridge), NULL);
pc_cpus_init(args->cpu_model, icc_bridge);
pc_cpus_init(machine->cpu_model, icc_bridge);
if (kvm_enabled() && kvmclock_enabled) {
kvmclock_create();
@ -119,13 +119,13 @@ static void pc_init1(QEMUMachineInitArgs *args,
* For old machine types, use whatever split we used historically to avoid
* breaking migration.
*/
if (args->ram_size >= 0xe0000000) {
if (machine->ram_size >= 0xe0000000) {
ram_addr_t lowmem = gigabyte_align ? 0xc0000000 : 0xe0000000;
above_4g_mem_size = args->ram_size - lowmem;
above_4g_mem_size = machine->ram_size - lowmem;
below_4g_mem_size = lowmem;
} else {
above_4g_mem_size = 0;
below_4g_mem_size = args->ram_size;
below_4g_mem_size = machine->ram_size;
}
if (pci_enabled) {
@ -145,16 +145,17 @@ static void pc_init1(QEMUMachineInitArgs *args,
guest_info->isapc_ram_fw = !pci_enabled;
if (smbios_defaults) {
MachineClass *mc = MACHINE_GET_CLASS(machine);
/* These values are guest ABI, do not change */
smbios_set_defaults("QEMU", "Standard PC (i440FX + PIIX, 1996)",
args->machine->name, smbios_legacy_mode);
mc->name, smbios_legacy_mode);
}
/* allocate ram and load rom/bios */
if (!xen_enabled()) {
fw_cfg = pc_memory_init(system_memory,
args->kernel_filename, args->kernel_cmdline,
args->initrd_filename,
machine->kernel_filename, machine->kernel_cmdline,
machine->initrd_filename,
below_4g_mem_size, above_4g_mem_size,
rom_memory, &ram_memory, guest_info);
}
@ -170,7 +171,7 @@ static void pc_init1(QEMUMachineInitArgs *args,
if (pci_enabled) {
pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, &isa_bus, gsi,
system_memory, system_io, args->ram_size,
system_memory, system_io, machine->ram_size,
below_4g_mem_size,
above_4g_mem_size,
pci_memory, ram_memory);
@ -235,7 +236,7 @@ static void pc_init1(QEMUMachineInitArgs *args,
}
}
pc_cmos_init(below_4g_mem_size, above_4g_mem_size, args->boot_order,
pc_cmos_init(below_4g_mem_size, above_4g_mem_size, machine->boot_order,
floppy, idebus[0], idebus[1], rtc_state);
if (pci_enabled && usb_enabled(false)) {
@ -258,131 +259,131 @@ static void pc_init1(QEMUMachineInitArgs *args,
}
}
static void pc_init_pci(QEMUMachineInitArgs *args)
static void pc_init_pci(MachineState *machine)
{
pc_init1(args, 1, 1);
pc_init1(machine, 1, 1);
}
static void pc_compat_2_0(QEMUMachineInitArgs *args)
static void pc_compat_2_0(MachineState *machine)
{
smbios_legacy_mode = true;
}
static void pc_compat_1_7(QEMUMachineInitArgs *args)
static void pc_compat_1_7(MachineState *machine)
{
pc_compat_2_0(args);
pc_compat_2_0(machine);
smbios_defaults = false;
gigabyte_align = false;
option_rom_has_mr = true;
x86_cpu_compat_disable_kvm_features(FEAT_1_ECX, CPUID_EXT_X2APIC);
}
static void pc_compat_1_6(QEMUMachineInitArgs *args)
static void pc_compat_1_6(MachineState *machine)
{
pc_compat_1_7(args);
pc_compat_1_7(machine);
has_pci_info = false;
rom_file_has_mr = false;
has_acpi_build = false;
}
static void pc_compat_1_5(QEMUMachineInitArgs *args)
static void pc_compat_1_5(MachineState *machine)
{
pc_compat_1_6(args);
pc_compat_1_6(machine);
}
static void pc_compat_1_4(QEMUMachineInitArgs *args)
static void pc_compat_1_4(MachineState *machine)
{
pc_compat_1_5(args);
pc_compat_1_5(machine);
x86_cpu_compat_set_features("n270", FEAT_1_ECX, 0, CPUID_EXT_MOVBE);
x86_cpu_compat_set_features("Westmere", FEAT_1_ECX, 0, CPUID_EXT_PCLMULQDQ);
}
static void pc_compat_1_3(QEMUMachineInitArgs *args)
static void pc_compat_1_3(MachineState *machine)
{
pc_compat_1_4(args);
pc_compat_1_4(machine);
enable_compat_apic_id_mode();
}
/* PC compat function for pc-0.14 to pc-1.2 */
static void pc_compat_1_2(QEMUMachineInitArgs *args)
static void pc_compat_1_2(MachineState *machine)
{
pc_compat_1_3(args);
pc_compat_1_3(machine);
x86_cpu_compat_disable_kvm_features(FEAT_KVM, KVM_FEATURE_PV_EOI);
}
static void pc_init_pci_2_0(QEMUMachineInitArgs *args)
static void pc_init_pci_2_0(MachineState *machine)
{
pc_compat_2_0(args);
pc_init_pci(args);
pc_compat_2_0(machine);
pc_init_pci(machine);
}
static void pc_init_pci_1_7(QEMUMachineInitArgs *args)
static void pc_init_pci_1_7(MachineState *machine)
{
pc_compat_1_7(args);
pc_init_pci(args);
pc_compat_1_7(machine);
pc_init_pci(machine);
}
static void pc_init_pci_1_6(QEMUMachineInitArgs *args)
static void pc_init_pci_1_6(MachineState *machine)
{
pc_compat_1_6(args);
pc_init_pci(args);
pc_compat_1_6(machine);
pc_init_pci(machine);
}
static void pc_init_pci_1_5(QEMUMachineInitArgs *args)
static void pc_init_pci_1_5(MachineState *machine)
{
pc_compat_1_5(args);
pc_init_pci(args);
pc_compat_1_5(machine);
pc_init_pci(machine);
}
static void pc_init_pci_1_4(QEMUMachineInitArgs *args)
static void pc_init_pci_1_4(MachineState *machine)
{
pc_compat_1_4(args);
pc_init_pci(args);
pc_compat_1_4(machine);
pc_init_pci(machine);
}
static void pc_init_pci_1_3(QEMUMachineInitArgs *args)
static void pc_init_pci_1_3(MachineState *machine)
{
pc_compat_1_3(args);
pc_init_pci(args);
pc_compat_1_3(machine);
pc_init_pci(machine);
}
/* PC machine init function for pc-0.14 to pc-1.2 */
static void pc_init_pci_1_2(QEMUMachineInitArgs *args)
static void pc_init_pci_1_2(MachineState *machine)
{
pc_compat_1_2(args);
pc_init_pci(args);
pc_compat_1_2(machine);
pc_init_pci(machine);
}
/* PC init function for pc-0.10 to pc-0.13, and reused by xenfv */
static void pc_init_pci_no_kvmclock(QEMUMachineInitArgs *args)
static void pc_init_pci_no_kvmclock(MachineState *machine)
{
has_pci_info = false;
has_acpi_build = false;
smbios_defaults = false;
x86_cpu_compat_disable_kvm_features(FEAT_KVM, KVM_FEATURE_PV_EOI);
enable_compat_apic_id_mode();
pc_init1(args, 1, 0);
pc_init1(machine, 1, 0);
}
static void pc_init_isa(QEMUMachineInitArgs *args)
static void pc_init_isa(MachineState *machine)
{
has_pci_info = false;
has_acpi_build = false;
smbios_defaults = false;
if (!args->cpu_model) {
args->cpu_model = "486";
if (!machine->cpu_model) {
machine->cpu_model = "486";
}
x86_cpu_compat_disable_kvm_features(FEAT_KVM, KVM_FEATURE_PV_EOI);
enable_compat_apic_id_mode();
pc_init1(args, 0, 1);
pc_init1(machine, 0, 1);
}
#ifdef CONFIG_XEN
static void pc_xen_hvm_init(QEMUMachineInitArgs *args)
static void pc_xen_hvm_init(MachineState *machine)
{
PCIBus *bus;
pc_init_pci(args);
pc_init_pci(machine);
bus = pci_find_primary_bus();
if (bus != NULL) {

67
hw/i386/pc_q35.c
View File

@ -59,7 +59,7 @@ static bool smbios_legacy_mode;
static bool gigabyte_align = true;
/* PC hardware initialisation */
static void pc_q35_init(QEMUMachineInitArgs *args)
static void pc_q35_init(MachineState *machine)
{
ram_addr_t below_4g_mem_size, above_4g_mem_size;
Q35PCIHost *q35_host;
@ -93,7 +93,7 @@ static void pc_q35_init(QEMUMachineInitArgs *args)
object_property_add_child(qdev_get_machine(), "icc-bridge",
OBJECT(icc_bridge), NULL);
pc_cpus_init(args->cpu_model, icc_bridge);
pc_cpus_init(machine->cpu_model, icc_bridge);
pc_acpi_init("q35-acpi-dsdt.aml");
kvmclock_create();
@ -107,13 +107,13 @@ static void pc_q35_init(QEMUMachineInitArgs *args)
* For old machine types, use whatever split we used historically to avoid
* breaking migration.
*/
if (args->ram_size >= 0xb0000000) {
if (machine->ram_size >= 0xb0000000) {
ram_addr_t lowmem = gigabyte_align ? 0x80000000 : 0xb0000000;
above_4g_mem_size = args->ram_size - lowmem;
above_4g_mem_size = machine->ram_size - lowmem;
below_4g_mem_size = lowmem;
} else {
above_4g_mem_size = 0;
below_4g_mem_size = args->ram_size;
below_4g_mem_size = machine->ram_size;
}
/* pci enabled */
@ -132,16 +132,17 @@ static void pc_q35_init(QEMUMachineInitArgs *args)
guest_info->has_acpi_build = has_acpi_build;
if (smbios_defaults) {
MachineClass *mc = MACHINE_GET_CLASS(machine);
/* These values are guest ABI, do not change */
smbios_set_defaults("QEMU", "Standard PC (Q35 + ICH9, 2009)",
args->machine->name, smbios_legacy_mode);
mc->name, smbios_legacy_mode);
}
/* allocate ram and load rom/bios */
if (!xen_enabled()) {
pc_memory_init(get_system_memory(),
args->kernel_filename, args->kernel_cmdline,
args->initrd_filename,
machine->kernel_filename, machine->kernel_cmdline,
machine->initrd_filename,
below_4g_mem_size, above_4g_mem_size,
rom_memory, &ram_memory, guest_info);
}
@ -230,7 +231,7 @@ static void pc_q35_init(QEMUMachineInitArgs *args)
0xb100),
8, NULL, 0);
pc_cmos_init(below_4g_mem_size, above_4g_mem_size, args->boot_order,
pc_cmos_init(below_4g_mem_size, above_4g_mem_size, machine->boot_order,
floppy, idebus[0], idebus[1], rtc_state);
/* the rest devices to which pci devfn is automatically assigned */
@ -241,68 +242,68 @@ static void pc_q35_init(QEMUMachineInitArgs *args)
}
}
static void pc_compat_2_0(QEMUMachineInitArgs *args)
static void pc_compat_2_0(MachineState *machine)
{
smbios_legacy_mode = true;
}
static void pc_compat_1_7(QEMUMachineInitArgs *args)
static void pc_compat_1_7(MachineState *machine)
{
pc_compat_2_0(args);
pc_compat_2_0(machine);
smbios_defaults = false;
gigabyte_align = false;
option_rom_has_mr = true;
x86_cpu_compat_disable_kvm_features(FEAT_1_ECX, CPUID_EXT_X2APIC);
}
static void pc_compat_1_6(QEMUMachineInitArgs *args)
static void pc_compat_1_6(MachineState *machine)
{
pc_compat_1_7(args);
pc_compat_1_7(machine);
has_pci_info = false;
rom_file_has_mr = false;
has_acpi_build = false;
}
static void pc_compat_1_5(QEMUMachineInitArgs *args)
static void pc_compat_1_5(MachineState *machine)
{
pc_compat_1_6(args);
pc_compat_1_6(machine);
}
static void pc_compat_1_4(QEMUMachineInitArgs *args)
static void pc_compat_1_4(MachineState *machine)
{
pc_compat_1_5(args);
pc_compat_1_5(machine);
x86_cpu_compat_set_features("n270", FEAT_1_ECX, 0, CPUID_EXT_MOVBE);
x86_cpu_compat_set_features("Westmere", FEAT_1_ECX, 0, CPUID_EXT_PCLMULQDQ);
}
static void pc_q35_init_2_0(QEMUMachineInitArgs *args)
static void pc_q35_init_2_0(MachineState *machine)
{
pc_compat_2_0(args);
pc_q35_init(args);
pc_compat_2_0(machine);
pc_q35_init(machine);
}
static void pc_q35_init_1_7(QEMUMachineInitArgs *args)
static void pc_q35_init_1_7(MachineState *machine)
{
pc_compat_1_7(args);
pc_q35_init(args);
pc_compat_1_7(machine);
pc_q35_init(machine);
}
static void pc_q35_init_1_6(QEMUMachineInitArgs *args)
static void pc_q35_init_1_6(MachineState *machine)
{
pc_compat_1_6(args);
pc_q35_init(args);
pc_compat_1_6(machine);
pc_q35_init(machine);
}
static void pc_q35_init_1_5(QEMUMachineInitArgs *args)
static void pc_q35_init_1_5(MachineState *machine)
{
pc_compat_1_5(args);
pc_q35_init(args);
pc_compat_1_5(machine);
pc_q35_init(machine);
}
static void pc_q35_init_1_4(QEMUMachineInitArgs *args)
static void pc_q35_init_1_4(MachineState *machine)
{
pc_compat_1_4(args);
pc_q35_init(args);
pc_compat_1_4(machine);
pc_q35_init(machine);
}
#define PC_Q35_MACHINE_OPTIONS \

16
hw/lm32/lm32_boards.c
View File

@ -69,10 +69,10 @@ static void main_cpu_reset(void *opaque)
env->deba = reset_info->flash_base;
}
static void lm32_evr_init(QEMUMachineInitArgs *args)
static void lm32_evr_init(MachineState *machine)
{
const char *cpu_model = args->cpu_model;
const char *kernel_filename = args->kernel_filename;
const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
LM32CPU *cpu;
CPULM32State *env;
DriveInfo *dinfo;
@ -162,12 +162,12 @@ static void lm32_evr_init(QEMUMachineInitArgs *args)
qemu_register_reset(main_cpu_reset, reset_info);
}
static void lm32_uclinux_init(QEMUMachineInitArgs *args)
static void lm32_uclinux_init(MachineState *machine)
{
const char *cpu_model = args->cpu_model;
const char *kernel_filename = args->kernel_filename;
const char *kernel_cmdline = args->kernel_cmdline;
const char *initrd_filename = args->initrd_filename;
const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
const char *kernel_cmdline = machine->kernel_cmdline;
const char *initrd_filename = machine->initrd_filename;
LM32CPU *cpu;
CPULM32State *env;
DriveInfo *dinfo;

10
hw/lm32/milkymist.c
View File

@ -74,12 +74,12 @@ static void main_cpu_reset(void *opaque)
}
static void
milkymist_init(QEMUMachineInitArgs *args)
milkymist_init(MachineState *machine)
{
const char *cpu_model = args->cpu_model;
const char *kernel_filename = args->kernel_filename;
const char *kernel_cmdline = args->kernel_cmdline;
const char *initrd_filename = args->initrd_filename;
const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
const char *kernel_cmdline = machine->kernel_cmdline;
const char *initrd_filename = machine->initrd_filename;
LM32CPU *cpu;
CPULM32State *env;
int kernel_size;

8
hw/m68k/an5206.c
View File

@ -20,11 +20,11 @@
/* Board init. */
static void an5206_init(QEMUMachineInitArgs *args)
static void an5206_init(MachineState *machine)
{
ram_addr_t ram_size = args->ram_size;
const char *cpu_model = args->cpu_model;
const char *kernel_filename = args->kernel_filename;
ram_addr_t ram_size = machine->ram_size;
const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
M68kCPU *cpu;
CPUM68KState *env;
int kernel_size;

8
hw/m68k/dummy_m68k.c
View File

@ -16,11 +16,11 @@
/* Board init. */
static void dummy_m68k_init(QEMUMachineInitArgs *args)
static void dummy_m68k_init(MachineState *machine)
{
ram_addr_t ram_size = args->ram_size;
const char *cpu_model = args->cpu_model;
const char *kernel_filename = args->kernel_filename;
ram_addr_t ram_size = machine->ram_size;
const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
CPUM68KState *env;
MemoryRegion *address_space_mem = get_system_memory();
MemoryRegion *ram = g_new(MemoryRegion, 1);

8
hw/m68k/mcf5208.c
View File

@ -188,11 +188,11 @@ static void mcf5208_sys_init(MemoryRegion *address_space, qemu_irq *pic)
}
}
static void mcf5208evb_init(QEMUMachineInitArgs *args)
static void mcf5208evb_init(MachineState *machine)
{
ram_addr_t ram_size = args->ram_size;
const char *cpu_model = args->cpu_model;
const char *kernel_filename = args->kernel_filename;
ram_addr_t ram_size = machine->ram_size;
const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
M68kCPU *cpu;
CPUM68KState *env;
int kernel_size;

8
hw/microblaze/petalogix_ml605_mmu.c
View File

@ -79,9 +79,9 @@ static void machine_cpu_reset(MicroBlazeCPU *cpu)
}
static void
petalogix_ml605_init(QEMUMachineInitArgs *args)
petalogix_ml605_init(MachineState *machine)
{
ram_addr_t ram_size = args->ram_size;
ram_addr_t ram_size = machine->ram_size;
MemoryRegion *address_space_mem = get_system_memory();
DeviceState *dev, *dma, *eth0;
Object *ds, *cs;
@ -196,13 +196,13 @@ petalogix_ml605_init(QEMUMachineInitArgs *args)
qemu_irq cs_line;
dev = ssi_create_slave(spi, "n25q128");
cs_line = qdev_get_gpio_in(dev, 0);
cs_line = qdev_get_gpio_in_named(dev, SSI_GPIO_CS, 0);
sysbus_connect_irq(busdev, i+1, cs_line);
}
}
microblaze_load_kernel(cpu, ddr_base, ram_size,
args->initrd_filename,
machine->initrd_filename,
BINARY_DEVICE_TREE_FILE,
machine_cpu_reset);

8
hw/microblaze/petalogix_s3adsp1800_mmu.c
View File

@ -59,10 +59,10 @@ static void machine_cpu_reset(MicroBlazeCPU *cpu)
}
static void
petalogix_s3adsp1800_init(QEMUMachineInitArgs *args)
petalogix_s3adsp1800_init(MachineState *machine)
{
ram_addr_t ram_size = args->ram_size;
const char *cpu_model = args->cpu_model;
ram_addr_t ram_size = machine->ram_size;
const char *cpu_model = machine->cpu_model;
DeviceState *dev;
MicroBlazeCPU *cpu;
DriveInfo *dinfo;
@ -128,7 +128,7 @@ petalogix_s3adsp1800_init(QEMUMachineInitArgs *args)
sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq[ETHLITE_IRQ]);
microblaze_load_kernel(cpu, ddr_base, ram_size,
args->initrd_filename,
machine->initrd_filename,
BINARY_DEVICE_TREE_FILE,
machine_cpu_reset);
}

12
hw/mips/mips_fulong2e.c
View File

@ -259,13 +259,13 @@ static void cpu_request_exit(void *opaque, int irq, int level)
}
}
static void mips_fulong2e_init(QEMUMachineInitArgs *args)
static void mips_fulong2e_init(MachineState *machine)
{
ram_addr_t ram_size = args->ram_size;
const char *cpu_model = args->cpu_model;
const char *kernel_filename = args->kernel_filename;
const char *kernel_cmdline = args->kernel_cmdline;
const char *initrd_filename = args->initrd_filename;
ram_addr_t ram_size = machine->ram_size;
const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
const char *kernel_cmdline = machine->kernel_cmdline;
const char *initrd_filename = machine->initrd_filename;
char *filename;
MemoryRegion *address_space_mem = get_system_memory();
MemoryRegion *ram = g_new(MemoryRegion, 1);

12
hw/mips/mips_jazz.c
View File

@ -329,19 +329,19 @@ static void mips_jazz_init(MemoryRegion *address_space,
}
static
void mips_magnum_init(QEMUMachineInitArgs *args)
void mips_magnum_init(MachineState *machine)
{
ram_addr_t ram_size = args->ram_size;
const char *cpu_model = args->cpu_model;
ram_addr_t ram_size = machine->ram_size;
const char *cpu_model = machine->cpu_model;
mips_jazz_init(get_system_memory(), get_system_io(),
ram_size, cpu_model, JAZZ_MAGNUM);
}
static
void mips_pica61_init(QEMUMachineInitArgs *args)
void mips_pica61_init(MachineState *machine)
{
ram_addr_t ram_size = args->ram_size;
const char *cpu_model = args->cpu_model;
ram_addr_t ram_size = machine->ram_size;
const char *cpu_model = machine->cpu_model;
mips_jazz_init(get_system_memory(), get_system_io(),
ram_size, cpu_model, JAZZ_PICA61);
}

12
hw/mips/mips_malta.c
View File

@ -875,13 +875,13 @@ static void cpu_request_exit(void *opaque, int irq, int level)
}
static
void mips_malta_init(QEMUMachineInitArgs *args)
void mips_malta_init(MachineState *machine)
{
ram_addr_t ram_size = args->ram_size;
const char *cpu_model = args->cpu_model;
const char *kernel_filename = args->kernel_filename;
const char *kernel_cmdline = args->kernel_cmdline;
const char *initrd_filename = args->initrd_filename;
ram_addr_t ram_size = machine->ram_size;
const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
const char *kernel_cmdline = machine->kernel_cmdline;
const char *initrd_filename = machine->initrd_filename;
char *filename;
pflash_t *fl;
MemoryRegion *system_memory = get_system_memory();

12
hw/mips/mips_mipssim.c
View File

@ -133,13 +133,13 @@ static void mipsnet_init(int base, qemu_irq irq, NICInfo *nd)
}
static void
mips_mipssim_init(QEMUMachineInitArgs *args)
mips_mipssim_init(MachineState *machine)
{
ram_addr_t ram_size = args->ram_size;
const char *cpu_model = args->cpu_model;
const char *kernel_filename = args->kernel_filename;
const char *kernel_cmdline = args->kernel_cmdline;
const char *initrd_filename = args->initrd_filename;
ram_addr_t ram_size = machine->ram_size;
const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
const char *kernel_cmdline = machine->kernel_cmdline;
const char *initrd_filename = machine->initrd_filename;
char *filename;
MemoryRegion *address_space_mem = get_system_memory();
MemoryRegion *isa = g_new(MemoryRegion, 1);

12
hw/mips/mips_r4k.c
View File

@ -153,13 +153,13 @@ static void main_cpu_reset(void *opaque)
static const int sector_len = 32 * 1024;
static
void mips_r4k_init(QEMUMachineInitArgs *args)
void mips_r4k_init(MachineState *machine)
{
ram_addr_t ram_size = args->ram_size;
const char *cpu_model = args->cpu_model;
const char *kernel_filename = args->kernel_filename;
const char *kernel_cmdline = args->kernel_cmdline;
const char *initrd_filename = args->initrd_filename;
ram_addr_t ram_size = machine->ram_size;
const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
const char *kernel_cmdline = machine->kernel_cmdline;
const char *initrd_filename = machine->initrd_filename;
char *filename;
MemoryRegion *address_space_mem = get_system_memory();
MemoryRegion *ram = g_new(MemoryRegion, 1);

12
hw/moxie/moxiesim.c
View File

@ -107,14 +107,14 @@ moxie_intc_create(hwaddr base, qemu_irq irq, int kind_of_intr)
return dev;
}
static void moxiesim_init(QEMUMachineInitArgs *args)
static void moxiesim_init(MachineState *machine)
{
MoxieCPU *cpu = NULL;
ram_addr_t ram_size = args->ram_size;
const char *cpu_model = args->cpu_model;
const char *kernel_filename = args->kernel_filename;
const char *kernel_cmdline = args->kernel_cmdline;
const char *initrd_filename = args->initrd_filename;
ram_addr_t ram_size = machine->ram_size;
const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
const char *kernel_cmdline = machine->kernel_cmdline;
const char *initrd_filename = machine->initrd_filename;
CPUMoxieState *env;
MemoryRegion *address_space_mem = get_system_memory();
MemoryRegion *ram = g_new(MemoryRegion, 1);

8
hw/openrisc/openrisc_sim.c
View File

@ -90,11 +90,11 @@ static void cpu_openrisc_load_kernel(ram_addr_t ram_size,
}
}
static void openrisc_sim_init(QEMUMachineInitArgs *args)
static void openrisc_sim_init(MachineState *machine)
{
ram_addr_t ram_size = args->ram_size;
const char *cpu_model = args->cpu_model;
const char *kernel_filename = args->kernel_filename;
ram_addr_t ram_size = machine->ram_size;
const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
OpenRISCCPU *cpu = NULL;
MemoryRegion *ram;
int n;

44
hw/ppc/e500.c
View File

@ -123,7 +123,7 @@ static void dt_serial_create(void *fdt, unsigned long long offset,
}
}
static int ppce500_load_device_tree(QEMUMachineInitArgs *args,
static int ppce500_load_device_tree(MachineState *machine,
PPCE500Params *params,
hwaddr addr,
hwaddr initrd_base,
@ -132,7 +132,7 @@ static int ppce500_load_device_tree(QEMUMachineInitArgs *args,
{
CPUPPCState *env = first_cpu->env_ptr;
int ret = -1;
uint64_t mem_reg_property[] = { 0, cpu_to_be64(args->ram_size) };
uint64_t mem_reg_property[] = { 0, cpu_to_be64(machine->ram_size) };
int fdt_size;
void *fdt;
uint8_t hypercall[16];
@ -207,7 +207,7 @@ static int ppce500_load_device_tree(QEMUMachineInitArgs *args,
}
ret = qemu_fdt_setprop_string(fdt, "/chosen", "bootargs",
args->kernel_cmdline);
machine->kernel_cmdline);
if (ret < 0)
fprintf(stderr, "couldn't set /chosen/bootargs\n");
@ -387,7 +387,7 @@ out:
}
typedef struct DeviceTreeParams {
QEMUMachineInitArgs args;
MachineState *machine;
PPCE500Params params;
hwaddr addr;
hwaddr initrd_base;
@ -397,18 +397,18 @@ typedef struct DeviceTreeParams {
static void ppce500_reset_device_tree(void *opaque)
{
DeviceTreeParams *p = opaque;
ppce500_load_device_tree(&p->args, &p->params, p->addr, p->initrd_base,
ppce500_load_device_tree(p->machine, &p->params, p->addr, p->initrd_base,
p->initrd_size, false);
}
static int ppce500_prep_device_tree(QEMUMachineInitArgs *args,
static int ppce500_prep_device_tree(MachineState *machine,
PPCE500Params *params,
hwaddr addr,
hwaddr initrd_base,
hwaddr initrd_size)
{
DeviceTreeParams *p = g_new(DeviceTreeParams, 1);
p->args = *args;
p->machine = machine;
p->params = *params;
p->addr = addr;
p->initrd_base = initrd_base;
@ -417,7 +417,7 @@ static int ppce500_prep_device_tree(QEMUMachineInitArgs *args,
qemu_register_reset(ppce500_reset_device_tree, p);
/* Issue the device tree loader once, so that we get the size of the blob */
return ppce500_load_device_tree(args, params, addr, initrd_base,
return ppce500_load_device_tree(machine, params, addr, initrd_base,
initrd_size, true);
}
@ -597,7 +597,7 @@ static qemu_irq *ppce500_init_mpic(PPCE500Params *params, MemoryRegion *ccsr,
return mpic;
}
void ppce500_init(QEMUMachineInitArgs *args, PPCE500Params *params)
void ppce500_init(MachineState *machine, PPCE500Params *params)
{
MemoryRegion *address_space_mem = get_system_memory();
MemoryRegion *ram = g_new(MemoryRegion, 1);
@ -622,8 +622,8 @@ void ppce500_init(QEMUMachineInitArgs *args, PPCE500Params *params)
PPCE500CCSRState *ccsr;
/* Setup CPUs */
if (args->cpu_model == NULL) {
args->cpu_model = "e500v2_v30";
if (machine->cpu_model == NULL) {
machine->cpu_model = "e500v2_v30";
}
irqs = g_malloc0(smp_cpus * sizeof(qemu_irq *));
@ -633,7 +633,7 @@ void ppce500_init(QEMUMachineInitArgs *args, PPCE500Params *params)
CPUState *cs;
qemu_irq *input;
cpu = cpu_ppc_init(args->cpu_model);
cpu = cpu_ppc_init(machine->cpu_model);
if (cpu == NULL) {
fprintf(stderr, "Unable to initialize CPU!\n");
exit(1);
@ -672,7 +672,7 @@ void ppce500_init(QEMUMachineInitArgs *args, PPCE500Params *params)
/* Fixup Memory size on a alignment boundary */
ram_size &= ~(RAM_SIZES_ALIGN - 1);
args->ram_size = ram_size;
machine->ram_size = ram_size;
/* Register Memory */
memory_region_init_ram(ram, NULL, "mpc8544ds.ram", ram_size);
@ -739,11 +739,11 @@ void ppce500_init(QEMUMachineInitArgs *args, PPCE500Params *params)
sysbus_create_simple("e500-spin", MPC8544_SPIN_BASE, NULL);
/* Load kernel. */
if (args->kernel_filename) {
kernel_size = load_uimage(args->kernel_filename, &entry,
if (machine->kernel_filename) {
kernel_size = load_uimage(machine->kernel_filename, &entry,
&loadaddr, NULL);
if (kernel_size < 0) {
kernel_size = load_elf(args->kernel_filename, NULL, NULL,
kernel_size = load_elf(machine->kernel_filename, NULL, NULL,
&elf_entry, &elf_lowaddr, NULL, 1,
ELF_MACHINE, 0);
entry = elf_entry;
@ -752,7 +752,7 @@ void ppce500_init(QEMUMachineInitArgs *args, PPCE500Params *params)
/* XXX try again as binary */
if (kernel_size < 0) {
fprintf(stderr, "qemu: could not load kernel '%s'\n",
args->kernel_filename);
machine->kernel_filename);
exit(1);
}
@ -764,14 +764,14 @@ void ppce500_init(QEMUMachineInitArgs *args, PPCE500Params *params)
}
/* Load initrd. */
if (args->initrd_filename) {
if (machine->initrd_filename) {
initrd_base = (cur_base + INITRD_LOAD_PAD) & ~INITRD_PAD_MASK;
initrd_size = load_image_targphys(args->initrd_filename, initrd_base,
initrd_size = load_image_targphys(machine->initrd_filename, initrd_base,
ram_size - initrd_base);
if (initrd_size < 0) {
fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
args->initrd_filename);
machine->initrd_filename);
exit(1);
}
@ -779,11 +779,11 @@ void ppce500_init(QEMUMachineInitArgs *args, PPCE500Params *params)
}
/* If we're loading a kernel directly, we must load the device tree too. */
if (args->kernel_filename) {
if (machine->kernel_filename) {
struct boot_info *boot_info;
int dt_size;
dt_size = ppce500_prep_device_tree(args, params, dt_base,
dt_size = ppce500_prep_device_tree(machine, params, dt_base,
initrd_base, initrd_size);
if (dt_size < 0) {
fprintf(stderr, "couldn't load device tree\n");

2
hw/ppc/e500.h
View File

@ -13,6 +13,6 @@ typedef struct PPCE500Params {
int mpic_version;
} PPCE500Params;
void ppce500_init(QEMUMachineInitArgs *args, PPCE500Params *params);
void ppce500_init(MachineState *machine, PPCE500Params *params);
#endif

4
hw/ppc/e500plat.c
View File

@ -28,7 +28,7 @@ static void e500plat_fixup_devtree(PPCE500Params *params, void *fdt)
sizeof(compatible));
}
static void e500plat_init(QEMUMachineInitArgs *args)
static void e500plat_init(MachineState *machine)
{
PPCE500Params params = {
.pci_first_slot = 0x1,
@ -43,7 +43,7 @@ static void e500plat_init(QEMUMachineInitArgs *args)
params.mpic_version = OPENPIC_MODEL_FSL_MPIC_20;
}
ppce500_init(args, &params);
ppce500_init(machine, &params);
}
static QEMUMachine e500plat_machine = {

14
hw/ppc/mac_newworld.c
View File

@ -140,14 +140,14 @@ static void ppc_core99_reset(void *opaque)
}
/* PowerPC Mac99 hardware initialisation */
static void ppc_core99_init(QEMUMachineInitArgs *args)
static void ppc_core99_init(MachineState *machine)
{
ram_addr_t ram_size = args->ram_size;
const char *cpu_model = args->cpu_model;
const char *kernel_filename = args->kernel_filename;
const char *kernel_cmdline = args->kernel_cmdline;
const char *initrd_filename = args->initrd_filename;
const char *boot_device = args->boot_order;
ram_addr_t ram_size = machine->ram_size;
const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
const char *kernel_cmdline = machine->kernel_cmdline;
const char *initrd_filename = machine->initrd_filename;
const char *boot_device = machine->boot_order;
PowerPCCPU *cpu = NULL;
CPUPPCState *env = NULL;
char *filename;

14
hw/ppc/mac_oldworld.c
View File

@ -71,14 +71,14 @@ static void ppc_heathrow_reset(void *opaque)
cpu_reset(CPU(cpu));
}
static void ppc_heathrow_init(QEMUMachineInitArgs *args)
static void ppc_heathrow_init(MachineState *machine)
{
ram_addr_t ram_size = args->ram_size;
const char *cpu_model = args->cpu_model;
const char *kernel_filename = args->kernel_filename;
const char *kernel_cmdline = args->kernel_cmdline;
const char *initrd_filename = args->initrd_filename;
const char *boot_device = args->boot_order;
ram_addr_t ram_size = machine->ram_size;
const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
const char *kernel_cmdline = machine->kernel_cmdline;
const char *initrd_filename = machine->initrd_filename;
const char *boot_device = machine->boot_order;
MemoryRegion *sysmem = get_system_memory();
PowerPCCPU *cpu = NULL;
CPUPPCState *env = NULL;

4
hw/ppc/mpc8544ds.c
View File

@ -26,7 +26,7 @@ static void mpc8544ds_fixup_devtree(PPCE500Params *params, void *fdt)
sizeof(compatible));
}
static void mpc8544ds_init(QEMUMachineInitArgs *args)
static void mpc8544ds_init(MachineState *machine)
{
PPCE500Params params = {
.pci_first_slot = 0x11,
@ -35,7 +35,7 @@ static void mpc8544ds_init(QEMUMachineInitArgs *args)
.mpic_version = OPENPIC_MODEL_FSL_MPIC_20,
};
ppce500_init(args, &params);
ppce500_init(machine, &params);
}

18
hw/ppc/ppc405_boards.c
View File

@ -172,12 +172,12 @@ static void ref405ep_fpga_init(MemoryRegion *sysmem, uint32_t base)
qemu_register_reset(&ref405ep_fpga_reset, fpga);
}
static void ref405ep_init(QEMUMachineInitArgs *args)
static void ref405ep_init(MachineState *machine)
{
ram_addr_t ram_size = args->ram_size;
const char *kernel_filename = args->kernel_filename;
const char *kernel_cmdline = args->kernel_cmdline;
const char *initrd_filename = args->initrd_filename;
ram_addr_t ram_size = machine->ram_size;
const char *kernel_filename = machine->kernel_filename;
const char *kernel_cmdline = machine->kernel_cmdline;
const char *initrd_filename = machine->initrd_filename;
char *filename;
ppc4xx_bd_info_t bd;
CPUPPCState *env;
@ -499,11 +499,11 @@ static void taihu_cpld_init(MemoryRegion *sysmem, uint32_t base)
qemu_register_reset(&taihu_cpld_reset, cpld);
}
static void taihu_405ep_init(QEMUMachineInitArgs *args)
static void taihu_405ep_init(MachineState *machine)
{
ram_addr_t ram_size = args->ram_size;
const char *kernel_filename = args->kernel_filename;
const char *initrd_filename = args->initrd_filename;
ram_addr_t ram_size = machine->ram_size;
const char *kernel_filename = machine->kernel_filename;
const char *initrd_filename = machine->initrd_filename;
char *filename;
qemu_irq *pic;
MemoryRegion *sysmem = get_system_memory();

12
hw/ppc/ppc440_bamboo.c
View File

@ -156,13 +156,13 @@ static void main_cpu_reset(void *opaque)
mmubooke_create_initial_mapping(env, 0, 0);
}
static void bamboo_init(QEMUMachineInitArgs *args)
static void bamboo_init(MachineState *machine)
{
ram_addr_t ram_size = args->ram_size;
const char *cpu_model = args->cpu_model;
const char *kernel_filename = args->kernel_filename;
const char *kernel_cmdline = args->kernel_cmdline;
const char *initrd_filename = args->initrd_filename;
ram_addr_t ram_size = machine->ram_size;
const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
const char *kernel_cmdline = machine->kernel_cmdline;
const char *initrd_filename = machine->initrd_filename;
unsigned int pci_irq_nrs[4] = { 28, 27, 26, 25 };
MemoryRegion *address_space_mem = get_system_memory();
MemoryRegion *isa = g_new(MemoryRegion, 1);

14
hw/ppc/prep.c
View File

@ -364,14 +364,14 @@ static const MemoryRegionPortio prep_portio_list[] = {
static PortioList prep_port_list;
/* PowerPC PREP hardware initialisation */
static void ppc_prep_init(QEMUMachineInitArgs *args)
static void ppc_prep_init(MachineState *machine)
{
ram_addr_t ram_size = args->ram_size;
const char *cpu_model = args->cpu_model;
const char *kernel_filename = args->kernel_filename;
const char *kernel_cmdline = args->kernel_cmdline;
const char *initrd_filename = args->initrd_filename;
const char *boot_device = args->boot_order;
ram_addr_t ram_size = machine->ram_size;
const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
const char *kernel_cmdline = machine->kernel_cmdline;
const char *initrd_filename = machine->initrd_filename;
const char *boot_device = machine->boot_order;
MemoryRegion *sysmem = get_system_memory();
PowerPCCPU *cpu = NULL;
CPUPPCState *env = NULL;

14
hw/ppc/spapr.c
View File

@ -1140,14 +1140,14 @@ static SaveVMHandlers savevm_htab_handlers = {
};
/* pSeries LPAR / sPAPR hardware init */
static void ppc_spapr_init(QEMUMachineInitArgs *args)
static void ppc_spapr_init(MachineState *machine)
{
ram_addr_t ram_size = args->ram_size;
const char *cpu_model = args->cpu_model;
const char *kernel_filename = args->kernel_filename;
const char *kernel_cmdline = args->kernel_cmdline;
const char *initrd_filename = args->initrd_filename;
const char *boot_device = args->boot_order;
ram_addr_t ram_size = machine->ram_size;
const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
const char *kernel_cmdline = machine->kernel_cmdline;
const char *initrd_filename = machine->initrd_filename;
const char *boot_device = machine->boot_order;
PowerPCCPU *cpu;
CPUPPCState *env;
PCIHostState *phb;

16
hw/ppc/virtex_ml507.c
View File

@ -194,12 +194,12 @@ static int xilinx_load_device_tree(hwaddr addr,
return fdt_size;
}
static void virtex_init(QEMUMachineInitArgs *args)
static void virtex_init(MachineState *machine)
{
ram_addr_t ram_size = args->ram_size;
const char *cpu_model = args->cpu_model;
const char *kernel_filename = args->kernel_filename;
const char *kernel_cmdline = args->kernel_cmdline;
ram_addr_t ram_size = machine->ram_size;
const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
const char *kernel_cmdline = machine->kernel_cmdline;
hwaddr initrd_base = 0;
int initrd_size = 0;
MemoryRegion *address_space_mem = get_system_memory();
@ -275,14 +275,14 @@ static void virtex_init(QEMUMachineInitArgs *args)
boot_info.ima_size = kernel_size;
/* Load initrd. */
if (args->initrd_filename) {
if (machine->initrd_filename) {
initrd_base = high = ROUND_UP(high, 4);
initrd_size = load_image_targphys(args->initrd_filename,
initrd_size = load_image_targphys(machine->initrd_filename,
high, ram_size - high);
if (initrd_size < 0) {
error_report("couldn't load ram disk '%s'",
args->initrd_filename);
machine->initrd_filename);
exit(1);
}
high = ROUND_UP(high + initrd_size, 4);

10
hw/s390x/s390-virtio-ccw.c
View File

@ -79,9 +79,9 @@ static void virtio_ccw_register_hcalls(void)
virtio_ccw_hcall_early_printk);
}
static void ccw_init(QEMUMachineInitArgs *args)
static void ccw_init(MachineState *machine)
{
ram_addr_t my_ram_size = args->ram_size;
ram_addr_t my_ram_size = machine->ram_size;
MemoryRegion *sysmem = get_system_memory();
MemoryRegion *ram = g_new(MemoryRegion, 1);
int shift = 0;
@ -102,8 +102,8 @@ static void ccw_init(QEMUMachineInitArgs *args)
/* get a BUS */
css_bus = virtual_css_bus_init();
s390_sclp_init();
s390_init_ipl_dev(args->kernel_filename, args->kernel_cmdline,
args->initrd_filename, "s390-ccw.img");
s390_init_ipl_dev(machine->kernel_filename, machine->kernel_cmdline,
machine->initrd_filename, "s390-ccw.img");
s390_flic_init();
/* register hypercalls */
@ -118,7 +118,7 @@ static void ccw_init(QEMUMachineInitArgs *args)
storage_keys = g_malloc0(my_ram_size / TARGET_PAGE_SIZE);
/* init CPUs */
s390_init_cpus(args->cpu_model, storage_keys);
s390_init_cpus(machine->cpu_model, storage_keys);
if (kvm_enabled()) {
kvm_s390_enable_css_support(s390_cpu_addr2state(0));

10
hw/s390x/s390-virtio.c
View File

@ -224,9 +224,9 @@ void s390_create_virtio_net(BusState *bus, const char *name)
}
/* PC hardware initialisation */
static void s390_init(QEMUMachineInitArgs *args)
static void s390_init(MachineState *machine)
{
ram_addr_t my_ram_size = args->ram_size;
ram_addr_t my_ram_size = machine->ram_size;
MemoryRegion *sysmem = get_system_memory();
MemoryRegion *ram = g_new(MemoryRegion, 1);
int shift = 0;
@ -248,8 +248,8 @@ static void s390_init(QEMUMachineInitArgs *args)
/* get a BUS */
s390_bus = s390_virtio_bus_init(&my_ram_size);
s390_sclp_init();
s390_init_ipl_dev(args->kernel_filename, args->kernel_cmdline,
args->initrd_filename, ZIPL_FILENAME);
s390_init_ipl_dev(machine->kernel_filename, machine->kernel_cmdline,
machine->initrd_filename, ZIPL_FILENAME);
s390_flic_init();
/* register hypercalls */
@ -273,7 +273,7 @@ static void s390_init(QEMUMachineInitArgs *args)
storage_keys = g_malloc0(my_ram_size / TARGET_PAGE_SIZE);
/* init CPUs */
s390_init_cpus(args->cpu_model, storage_keys);
s390_init_cpus(machine->cpu_model, storage_keys);
/* Create VirtIO network adapters */
s390_create_virtio_net((BusState *)s390_bus, "virtio-net-s390");

10
hw/sh4/r2d.c
View File

@ -219,12 +219,12 @@ static struct QEMU_PACKED
char kernel_cmdline[256];
} boot_params;
static void r2d_init(QEMUMachineInitArgs *args)
static void r2d_init(MachineState *machine)
{
const char *cpu_model = args->cpu_model;
const char *kernel_filename = args->kernel_filename;
const char *kernel_cmdline = args->kernel_cmdline;
const char *initrd_filename = args->initrd_filename;
const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
const char *kernel_cmdline = machine->kernel_cmdline;
const char *initrd_filename = machine->initrd_filename;
SuperHCPU *cpu;
CPUSH4State *env;
ResetData *reset_info;

4
hw/sh4/shix.c
View File

@ -39,9 +39,9 @@
#define BIOS_FILENAME "shix_bios.bin"
#define BIOS_ADDRESS 0xA0000000
static void shix_init(QEMUMachineInitArgs *args)
static void shix_init(MachineState *machine)
{
const char *cpu_model = args->cpu_model;
const char *cpu_model = machine->cpu_model;
int ret;
SuperHCPU *cpu;
struct SH7750State *s;

8
hw/sparc/leon3.c
View File

@ -101,11 +101,11 @@ static void leon3_set_pil_in(void *opaque, uint32_t pil_in)
}
}
static void leon3_generic_hw_init(QEMUMachineInitArgs *args)
static void leon3_generic_hw_init(MachineState *machine)
{
ram_addr_t ram_size = args->ram_size;
const char *cpu_model = args->cpu_model;
const char *kernel_filename = args->kernel_filename;
ram_addr_t ram_size = machine->ram_size;
const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
SPARCCPU *cpu;
CPUSPARCState *env;
MemoryRegion *address_space_mem = get_system_memory();

68
hw/sparc/sun4m.c
View File

@ -867,9 +867,9 @@ static void dummy_fdc_tc(void *opaque, int irq, int level)
}
static void sun4m_hw_init(const struct sun4m_hwdef *hwdef,
QEMUMachineInitArgs *args)
MachineState *machine)
{
const char *cpu_model = args->cpu_model;
const char *cpu_model = machine->cpu_model;
unsigned int i;
void *iommu, *espdma, *ledma, *nvram;
qemu_irq *cpu_irqs[MAX_CPUS], slavio_irq[32], slavio_cpu_irq[MAX_CPUS],
@ -895,10 +895,10 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef,
/* set up devices */
ram_init(0, args->ram_size, hwdef->max_mem);
ram_init(0, machine->ram_size, hwdef->max_mem);
/* models without ECC don't trap when missing ram is accessed */
if (!hwdef->ecc_base) {
empty_slot_init(args->ram_size, hwdef->max_mem - args->ram_size);
empty_slot_init(machine->ram_size, hwdef->max_mem - machine->ram_size);
}
prom_init(hwdef->slavio_base, bios_name);
@ -1051,14 +1051,14 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef,
empty_slot_init(hwdef->bpp_base, 0x20);
}
kernel_size = sun4m_load_kernel(args->kernel_filename,
args->initrd_filename,
args->ram_size);
kernel_size = sun4m_load_kernel(machine->kernel_filename,
machine->initrd_filename,
machine->ram_size);
nvram_init(nvram, (uint8_t *)&nd_table[0].macaddr, args->kernel_cmdline,
args->boot_order, args->ram_size, kernel_size, graphic_width,
graphic_height, graphic_depth, hwdef->nvram_machine_id,
"Sun4m");
nvram_init(nvram, (uint8_t *)&nd_table[0].macaddr, machine->kernel_cmdline,
machine->boot_order, machine->ram_size, kernel_size,
graphic_width, graphic_height, graphic_depth,
hwdef->nvram_machine_id, "Sun4m");
if (hwdef->ecc_base)
ecc_init(hwdef->ecc_base, slavio_irq[28],
@ -1074,20 +1074,20 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef,
fw_cfg_add_i16(fw_cfg, FW_CFG_SUN4M_HEIGHT, graphic_height);
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, KERNEL_LOAD_ADDR);
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
if (args->kernel_cmdline) {
if (machine->kernel_cmdline) {
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, CMDLINE_ADDR);
pstrcpy_targphys("cmdline", CMDLINE_ADDR, TARGET_PAGE_SIZE,
args->kernel_cmdline);
fw_cfg_add_string(fw_cfg, FW_CFG_CMDLINE_DATA, args->kernel_cmdline);
machine->kernel_cmdline);
fw_cfg_add_string(fw_cfg, FW_CFG_CMDLINE_DATA, machine->kernel_cmdline);
fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE,
strlen(args->kernel_cmdline) + 1);
strlen(machine->kernel_cmdline) + 1);
} else {
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE, 0);
}
fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, INITRD_LOAD_ADDR);
fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, 0); // not used
fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, args->boot_order[0]);
fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, machine->boot_order[0]);
qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
}
@ -1349,57 +1349,57 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = {
};
/* SPARCstation 5 hardware initialisation */
static void ss5_init(QEMUMachineInitArgs *args)
static void ss5_init(MachineState *machine)
{
sun4m_hw_init(&sun4m_hwdefs[0], args);
sun4m_hw_init(&sun4m_hwdefs[0], machine);
}
/* SPARCstation 10 hardware initialisation */
static void ss10_init(QEMUMachineInitArgs *args)
static void ss10_init(MachineState *machine)
{
sun4m_hw_init(&sun4m_hwdefs[1], args);
sun4m_hw_init(&sun4m_hwdefs[1], machine);
}
/* SPARCserver 600MP hardware initialisation */
static void ss600mp_init(QEMUMachineInitArgs *args)
static void ss600mp_init(MachineState *machine)
{
sun4m_hw_init(&sun4m_hwdefs[2], args);
sun4m_hw_init(&sun4m_hwdefs[2], machine);
}
/* SPARCstation 20 hardware initialisation */
static void ss20_init(QEMUMachineInitArgs *args)
static void ss20_init(MachineState *machine)
{
sun4m_hw_init(&sun4m_hwdefs[3], args);
sun4m_hw_init(&sun4m_hwdefs[3], machine);
}
/* SPARCstation Voyager hardware initialisation */
static void vger_init(QEMUMachineInitArgs *args)
static void vger_init(MachineState *machine)
{
sun4m_hw_init(&sun4m_hwdefs[4], args);
sun4m_hw_init(&sun4m_hwdefs[4], machine);
}
/* SPARCstation LX hardware initialisation */
static void ss_lx_init(QEMUMachineInitArgs *args)
static void ss_lx_init(MachineState *machine)
{
sun4m_hw_init(&sun4m_hwdefs[5], args);
sun4m_hw_init(&sun4m_hwdefs[5], machine);
}
/* SPARCstation 4 hardware initialisation */
static void ss4_init(QEMUMachineInitArgs *args)
static void ss4_init(MachineState *machine)
{
sun4m_hw_init(&sun4m_hwdefs[6], args);
sun4m_hw_init(&sun4m_hwdefs[6], machine);
}
/* SPARCClassic hardware initialisation */
static void scls_init(QEMUMachineInitArgs *args)
static void scls_init(MachineState *machine)
{
sun4m_hw_init(&sun4m_hwdefs[7], args);
sun4m_hw_init(&sun4m_hwdefs[7], machine);
}
/* SPARCbook hardware initialisation */
static void sbook_init(QEMUMachineInitArgs *args)
static void sbook_init(MachineState *machine)
{
sun4m_hw_init(&sun4m_hwdefs[8], args);
sun4m_hw_init(&sun4m_hwdefs[8], machine);
}
static QEMUMachine ss5_machine = {

36
hw/sparc64/sun4u.c
View File

@ -811,7 +811,7 @@ static SPARCCPU *cpu_devinit(const char *cpu_model, const struct hwdef *hwdef)
}
static void sun4uv_init(MemoryRegion *address_space_mem,
QEMUMachineInitArgs *args,
MachineState *machine,
const struct hwdef *hwdef)
{
SPARCCPU *cpu;
@ -826,10 +826,10 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
FWCfgState *fw_cfg;
/* init CPUs */
cpu = cpu_devinit(args->cpu_model, hwdef);
cpu = cpu_devinit(machine->cpu_model, hwdef);
/* set up devices */
ram_init(0, args->ram_size);
ram_init(0, machine->ram_size);
prom_init(hwdef->prom_addr, bios_name);
@ -875,15 +875,15 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
initrd_size = 0;
initrd_addr = 0;
kernel_size = sun4u_load_kernel(args->kernel_filename,
args->initrd_filename,
kernel_size = sun4u_load_kernel(machine->kernel_filename,
machine->initrd_filename,
ram_size, &initrd_size, &initrd_addr,
&kernel_addr, &kernel_entry);
sun4u_NVRAM_set_params(nvram, NVRAM_SIZE, "Sun4u", args->ram_size,
args->boot_order,
sun4u_NVRAM_set_params(nvram, NVRAM_SIZE, "Sun4u", machine->ram_size,
machine->boot_order,
kernel_addr, kernel_size,
args->kernel_cmdline,
machine->kernel_cmdline,
initrd_addr, initrd_size,
/* XXX: need an option to load a NVRAM image */
0,
@ -897,16 +897,16 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, hwdef->machine_id);
fw_cfg_add_i64(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_entry);
fw_cfg_add_i64(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
if (args->kernel_cmdline) {
if (machine->kernel_cmdline) {
fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE,
strlen(args->kernel_cmdline) + 1);
fw_cfg_add_string(fw_cfg, FW_CFG_CMDLINE_DATA, args->kernel_cmdline);
strlen(machine->kernel_cmdline) + 1);
fw_cfg_add_string(fw_cfg, FW_CFG_CMDLINE_DATA, machine->kernel_cmdline);
} else {
fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE, 0);
}
fw_cfg_add_i64(fw_cfg, FW_CFG_INITRD_ADDR, initrd_addr);
fw_cfg_add_i64(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, args->boot_order[0]);
fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, machine->boot_order[0]);
fw_cfg_add_i16(fw_cfg, FW_CFG_SPARC64_WIDTH, graphic_width);
fw_cfg_add_i16(fw_cfg, FW_CFG_SPARC64_HEIGHT, graphic_height);
@ -946,21 +946,21 @@ static const struct hwdef hwdefs[] = {
};
/* Sun4u hardware initialisation */
static void sun4u_init(QEMUMachineInitArgs *args)
static void sun4u_init(MachineState *machine)
{
sun4uv_init(get_system_memory(), args, &hwdefs[0]);
sun4uv_init(get_system_memory(), machine, &hwdefs[0]);
}
/* Sun4v hardware initialisation */
static void sun4v_init(QEMUMachineInitArgs *args)
static void sun4v_init(MachineState *machine)
{
sun4uv_init(get_system_memory(), args, &hwdefs[1]);
sun4uv_init(get_system_memory(), machine, &hwdefs[1]);
}
/* Niagara hardware initialisation */
static void niagara_init(QEMUMachineInitArgs *args)
static void niagara_init(MachineState *machine)
{
sun4uv_init(get_system_memory(), args, &hwdefs[2]);
sun4uv_init(get_system_memory(), machine, &hwdefs[2]);
}
static QEMUMachine sun4u_machine = {

4
hw/ssi/ssi.c
View File

@ -60,7 +60,7 @@ static int ssi_slave_init(DeviceState *dev)
if (ssc->transfer_raw == ssi_transfer_raw_default &&
ssc->cs_polarity != SSI_CS_NONE) {
qdev_init_gpio_in(dev, ssi_cs_default, 1);
qdev_init_gpio_in_named(dev, ssi_cs_default, SSI_GPIO_CS, 1);
}
return ssc->init(s);
@ -155,7 +155,7 @@ static int ssi_auto_connect_slave(Object *child, void *opaque)
return 0;
}
cs_line = qdev_get_gpio_in(DEVICE(dev), 0);
cs_line = qdev_get_gpio_in_named(DEVICE(dev), SSI_GPIO_CS, 0);
qdev_set_parent_bus(DEVICE(dev), BUS(arg->bus));
**arg->cs_linep = cs_line;
(*arg->cs_linep)++;

10
hw/unicore32/puv3.c
View File

@ -101,12 +101,12 @@ static void puv3_load_kernel(const char *kernel_filename)
graphic_console_init(NULL, 0, &no_ops, NULL);
}
static void puv3_init(QEMUMachineInitArgs *args)
static void puv3_init(MachineState *machine)
{
ram_addr_t ram_size = args->ram_size;
const char *cpu_model = args->cpu_model;
const char *kernel_filename = args->kernel_filename;
const char *initrd_filename = args->initrd_filename;
ram_addr_t ram_size = machine->ram_size;
const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
const char *initrd_filename = machine->initrd_filename;
CPUUniCore32State *env;
if (initrd_filename) {

8
hw/xenpv/xen_machine_pv.c
View File

@ -28,11 +28,11 @@
#include "xen_domainbuild.h"
#include "sysemu/blockdev.h"
static void xen_init_pv(QEMUMachineInitArgs *args)
static void xen_init_pv(MachineState *machine)
{
const char *kernel_filename = args->kernel_filename;
const char *kernel_cmdline = args->kernel_cmdline;
const char *initrd_filename = args->initrd_filename;
const char *kernel_filename = machine->kernel_filename;
const char *kernel_cmdline = machine->kernel_cmdline;
const char *initrd_filename = machine->initrd_filename;
DriveInfo *dinfo;
int i;

26
hw/xtensa/xtensa_lx60.c
View File

@ -159,7 +159,7 @@ static void lx60_reset(void *opaque)
cpu_reset(CPU(cpu));
}
static void lx_init(const LxBoardDesc *board, QEMUMachineInitArgs *args)
static void lx_init(const LxBoardDesc *board, MachineState *machine)
{
#ifdef TARGET_WORDS_BIGENDIAN
int be = 1;
@ -172,9 +172,9 @@ static void lx_init(const LxBoardDesc *board, QEMUMachineInitArgs *args)
MemoryRegion *ram, *rom, *system_io;
DriveInfo *dinfo;
pflash_t *flash = NULL;
const char *cpu_model = args->cpu_model;
const char *kernel_filename = args->kernel_filename;
const char *kernel_cmdline = args->kernel_cmdline;
const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
const char *kernel_cmdline = machine->kernel_cmdline;
int n;
if (!cpu_model) {
@ -198,7 +198,7 @@ static void lx_init(const LxBoardDesc *board, QEMUMachineInitArgs *args)
}
ram = g_malloc(sizeof(*ram));
memory_region_init_ram(ram, NULL, "lx60.dram", args->ram_size);
memory_region_init_ram(ram, NULL, "lx60.dram", machine->ram_size);
vmstate_register_ram_global(ram);
memory_region_add_subregion(system_memory, 0, ram);
@ -275,7 +275,7 @@ static void lx_init(const LxBoardDesc *board, QEMUMachineInitArgs *args)
}
}
static void xtensa_lx60_init(QEMUMachineInitArgs *args)
static void xtensa_lx60_init(MachineState *machine)
{
static const LxBoardDesc lx60_board = {
.flash_base = 0xf8000000,
@ -283,10 +283,10 @@ static void xtensa_lx60_init(QEMUMachineInitArgs *args)
.flash_sector_size = 0x10000,
.sram_size = 0x20000,
};
lx_init(&lx60_board, args);
lx_init(&lx60_board, machine);
}
static void xtensa_lx200_init(QEMUMachineInitArgs *args)
static void xtensa_lx200_init(MachineState *machine)
{
static const LxBoardDesc lx200_board = {
.flash_base = 0xf8000000,
@ -294,10 +294,10 @@ static void xtensa_lx200_init(QEMUMachineInitArgs *args)
.flash_sector_size = 0x20000,
.sram_size = 0x2000000,
};
lx_init(&lx200_board, args);
lx_init(&lx200_board, machine);
}
static void xtensa_ml605_init(QEMUMachineInitArgs *args)
static void xtensa_ml605_init(MachineState *machine)
{
static const LxBoardDesc ml605_board = {
.flash_base = 0xf8000000,
@ -305,10 +305,10 @@ static void xtensa_ml605_init(QEMUMachineInitArgs *args)
.flash_sector_size = 0x20000,
.sram_size = 0x2000000,
};
lx_init(&ml605_board, args);
lx_init(&ml605_board, machine);
}
static void xtensa_kc705_init(QEMUMachineInitArgs *args)
static void xtensa_kc705_init(MachineState *machine)
{
static const LxBoardDesc kc705_board = {
.flash_base = 0xf0000000,
@ -316,7 +316,7 @@ static void xtensa_kc705_init(QEMUMachineInitArgs *args)
.flash_sector_size = 0x20000,
.sram_size = 0x2000000,
};
lx_init(&kc705_board, args);
lx_init(&kc705_board, machine);
}
static QEMUMachine xtensa_lx60_machine = {

8
hw/xtensa/xtensa_sim.c
View File

@ -46,14 +46,14 @@ static void sim_reset(void *opaque)
cpu_reset(CPU(cpu));
}
static void xtensa_sim_init(QEMUMachineInitArgs *args)
static void xtensa_sim_init(MachineState *machine)
{
XtensaCPU *cpu = NULL;
CPUXtensaState *env = NULL;
MemoryRegion *ram, *rom;
ram_addr_t ram_size = args->ram_size;
const char *cpu_model = args->cpu_model;
const char *kernel_filename = args->kernel_filename;
ram_addr_t ram_size = machine->ram_size;
const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
int n;
if (!cpu_model) {

27
include/hw/boards.h
View File

@ -8,17 +8,10 @@
#include "hw/qdev.h"
#include "qom/object.h"
typedef struct QEMUMachineInitArgs {
const MachineClass *machine;
ram_addr_t ram_size;
const char *boot_order;
const char *kernel_filename;
const char *kernel_cmdline;
const char *initrd_filename;
const char *cpu_model;
} QEMUMachineInitArgs;
typedef void QEMUMachineInitFunc(QEMUMachineInitArgs *args);
typedef struct MachineState MachineState;
typedef void QEMUMachineInitFunc(MachineState *ms);
typedef void QEMUMachineResetFunc(void);
@ -62,8 +55,6 @@ int qemu_register_machine(QEMUMachine *m);
#define MACHINE_CLASS(klass) \
OBJECT_CLASS_CHECK(MachineClass, (klass), TYPE_MACHINE)
typedef struct MachineState MachineState;
MachineClass *find_default_machine(void);
extern MachineState *current_machine;
@ -80,7 +71,7 @@ struct MachineClass {
const char *alias;
const char *desc;
void (*init)(QEMUMachineInitArgs *args);
void (*init)(MachineState *state);
void (*reset)(void);
void (*hot_add_cpu)(const int64_t id, Error **errp);
int (*kvm_type)(const char *arg);
@ -112,9 +103,6 @@ struct MachineState {
char *accel;
bool kernel_irqchip;
int kvm_shadow_mem;
char *kernel;
char *initrd;
char *append;
char *dtb;
char *dumpdtb;
int phandle_start;
@ -124,7 +112,12 @@ struct MachineState {
bool usb;
char *firmware;
QEMUMachineInitArgs init_args;
ram_addr_t ram_size;
const char *boot_order;
char *kernel_filename;
char *kernel_cmdline;
char *initrd_filename;
const char *cpu_model;
};
#endif

24
include/hw/qdev-core.h
View File

@ -131,6 +131,17 @@ typedef struct DeviceClass {
const char *bus_type;
} DeviceClass;
typedef struct NamedGPIOList NamedGPIOList;
struct NamedGPIOList {
char *name;
qemu_irq *in;
int num_in;
qemu_irq *out;
int num_out;
QLIST_ENTRY(NamedGPIOList) node;
};
/**
* DeviceState:
* @realized: Indicates whether the device has been fully constructed.
@ -148,10 +159,7 @@ struct DeviceState {
QemuOpts *opts;
int hotplugged;
BusState *parent_bus;
int num_gpio_out;
qemu_irq *gpio_out;
int num_gpio_in;
qemu_irq *gpio_in;
QLIST_HEAD(, NamedGPIOList) gpios;
QLIST_HEAD(, BusState) child_bus;
int num_child_bus;
int instance_id_alias;
@ -252,7 +260,11 @@ void qdev_machine_creation_done(void);
bool qdev_machine_modified(void);
qemu_irq qdev_get_gpio_in(DeviceState *dev, int n);
qemu_irq qdev_get_gpio_in_named(DeviceState *dev, const char *name, int n);
void qdev_connect_gpio_out(DeviceState *dev, int n, qemu_irq pin);
void qdev_connect_gpio_out_named(DeviceState *dev, const char *name, int n,
qemu_irq pin);
BusState *qdev_get_child_bus(DeviceState *dev, const char *name);
@ -262,6 +274,10 @@ BusState *qdev_get_child_bus(DeviceState *dev, const char *name);
/* GPIO inputs also double as IRQ sinks. */
void qdev_init_gpio_in(DeviceState *dev, qemu_irq_handler handler, int n);
void qdev_init_gpio_out(DeviceState *dev, qemu_irq *pins, int n);
void qdev_init_gpio_in_named(DeviceState *dev, qemu_irq_handler handler,
const char *name, int n);
void qdev_init_gpio_out_named(DeviceState *dev, qemu_irq *pins,
const char *name, int n);
BusState *qdev_get_parent_bus(DeviceState *dev);

2
include/hw/ssi.h
View File

@ -23,6 +23,8 @@ typedef struct SSISlave SSISlave;
#define SSI_SLAVE_GET_CLASS(obj) \
OBJECT_GET_CLASS(SSISlaveClass, (obj), TYPE_SSI_SLAVE)
#define SSI_GPIO_CS "ssi-gpio-cs"
typedef enum {
SSI_CS_NONE = 0,
SSI_CS_LOW,

6
qapi/qmp-output-visitor.c
View File

@ -66,6 +66,12 @@ static QObject *qmp_output_pop(QmpOutputVisitor *qov)
static QObject *qmp_output_first(QmpOutputVisitor *qov)
{
QStackEntry *e = QTAILQ_LAST(&qov->stack, QStack);
/* FIXME - find a better way to deal with NULL values */
if (!e) {
return NULL;
}
return e->value;
}

16
qdev-monitor.c
View File

@ -613,14 +613,20 @@ static void qdev_print(Monitor *mon, DeviceState *dev, int indent)
{
ObjectClass *class;
BusState *child;
NamedGPIOList *ngl;
qdev_printf("dev: %s, id \"%s\"\n", object_get_typename(OBJECT(dev)),
dev->id ? dev->id : "");
indent += 2;
if (dev->num_gpio_in) {
qdev_printf("gpio-in %d\n", dev->num_gpio_in);
}
if (dev->num_gpio_out) {
qdev_printf("gpio-out %d\n", dev->num_gpio_out);
QLIST_FOREACH(ngl, &dev->gpios, node) {
if (ngl->num_in) {
qdev_printf("gpio-in \"%s\" %d\n", ngl->name ? ngl->name : "",
ngl->num_in);
}
if (ngl->num_out) {
qdev_printf("gpio-out \"%s\" %d\n", ngl->name ? ngl->name : "",
ngl->num_out);
}
}
class = object_get_class(OBJECT(dev));
do {

19
qtest.c
View File

@ -233,7 +233,8 @@ static void qtest_process_command(CharDriverState *chr, gchar **words)
g_assert(command);
if (strcmp(words[0], "irq_intercept_out") == 0
|| strcmp(words[0], "irq_intercept_in") == 0) {
DeviceState *dev;
DeviceState *dev;
NamedGPIOList *ngl;
g_assert(words[1]);
dev = DEVICE(object_resolve_path(words[1], NULL));
@ -253,10 +254,18 @@ static void qtest_process_command(CharDriverState *chr, gchar **words)
return;
}
if (words[0][14] == 'o') {
qemu_irq_intercept_out(&dev->gpio_out, qtest_irq_handler, dev->num_gpio_out);
} else {
qemu_irq_intercept_in(dev->gpio_in, qtest_irq_handler, dev->num_gpio_in);
QLIST_FOREACH(ngl, &dev->gpios, node) {
/* We don't support intercept of named GPIOs yet */
if (ngl->name) {
continue;
}
if (words[0][14] == 'o') {
qemu_irq_intercept_out(&ngl->out, qtest_irq_handler,
ngl->num_out);
} else {
qemu_irq_intercept_in(ngl->in, qtest_irq_handler,
ngl->num_in);
}
}
irq_intercept_dev = dev;
qtest_send_prefix(chr);

15
tests/qom-test.c
View File

@ -44,7 +44,7 @@ static bool is_blacklisted(const char *arch, const char *mach)
return false;
}
static void test_properties(const char *path)
static void test_properties(const char *path, bool recurse)
{
char *child_path;
QDict *response, *tuple;
@ -56,14 +56,21 @@ static void test_properties(const char *path)
" 'arguments': { 'path': '%s' } }", path);
g_assert(response);
if (!recurse) {
return;
}
g_assert(qdict_haskey(response, "return"));
list = qobject_to_qlist(qdict_get(response, "return"));
QLIST_FOREACH_ENTRY(list, entry) {
tuple = qobject_to_qdict(qlist_entry_obj(entry));
if (strstart(qdict_get_str(tuple, "type"), "child<", NULL)) {
bool is_child = strstart(qdict_get_str(tuple, "type"), "child<", NULL);
bool is_link = strstart(qdict_get_str(tuple, "type"), "link<", NULL);
if (is_child || is_link) {
child_path = g_strdup_printf("%s/%s",
path, qdict_get_str(tuple, "name"));
test_properties(child_path);
test_properties(child_path, is_child);
g_free(child_path);
} else {
const char *prop = qdict_get_str(tuple, "name");
@ -87,7 +94,7 @@ static void test_machine(gconstpointer data)
args = g_strdup_printf("-machine %s", machine);
qtest_start(args);
test_properties("/machine");
test_properties("/machine", true);
response = qmp("{ 'execute': 'quit' }");
g_assert(qdict_haskey(response, "return"));

11
tests/test-qmp-output-visitor.c
View File

@ -507,6 +507,15 @@ static void test_visitor_out_union_anon(TestOutputVisitorData *data,
qapi_free_UserDefAnonUnion(tmp);
}
static void test_visitor_out_empty(TestOutputVisitorData *data,
const void *unused)
{
QObject *arg;
arg = qmp_output_get_qobject(data->qov);
g_assert(!arg);
}
static void init_native_list(UserDefNativeListUnion *cvalue)
{
int i;
@ -859,6 +868,8 @@ int main(int argc, char **argv)
&out_visitor_data, test_visitor_out_union_flat);
output_visitor_test_add("/visitor/output/union-anon",
&out_visitor_data, test_visitor_out_union_anon);
output_visitor_test_add("/visitor/output/empty",
&out_visitor_data, test_visitor_out_empty);
output_visitor_test_add("/visitor/output/native_list/int",
&out_visitor_data, test_visitor_out_native_list_int);
output_visitor_test_add("/visitor/output/native_list/int8",

24
vl.c
View File

@ -2891,7 +2891,8 @@ static int object_set_property(const char *name, const char *value, void *opaque
StringInputVisitor *siv;
Error *local_err = NULL;
if (strcmp(name, "qom-type") == 0 || strcmp(name, "id") == 0) {
if (strcmp(name, "qom-type") == 0 || strcmp(name, "id") == 0 ||
strcmp(name, "type") == 0) {
return 0;
}
@ -4219,6 +4220,13 @@ int main(int argc, char **argv, char **envp)
exit(0);
}
machine_opts = qemu_get_machine_opts();
if (qemu_opt_foreach(machine_opts, object_set_property, current_machine,
1) < 0) {
object_unref(OBJECT(current_machine));
exit(1);
}
configure_accelerator(machine_class);
if (qtest_chrdev) {
@ -4263,6 +4271,7 @@ int main(int argc, char **argv, char **envp)
if (!kernel_cmdline) {
kernel_cmdline = "";
current_machine->kernel_cmdline = (char *)kernel_cmdline;
}
linux_boot = (kernel_filename != NULL);
@ -4425,16 +4434,11 @@ int main(int argc, char **argv, char **envp)
qdev_machine_init();
current_machine->init_args = (QEMUMachineInitArgs) {
.machine = machine_class,
.ram_size = ram_size,
.boot_order = boot_order,
.kernel_filename = kernel_filename,
.kernel_cmdline = kernel_cmdline,
.initrd_filename = initrd_filename,
.cpu_model = cpu_model };
current_machine->ram_size = ram_size;
current_machine->boot_order = boot_order;
current_machine->cpu_model = cpu_model;
machine_class->init(&current_machine->init_args);
machine_class->init(current_machine);
audio_init();