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https://gitlab.com/qemu-project/qemu
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target-i386: add AES-NI instructions
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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@ -1447,7 +1447,7 @@ static const unsigned char threebyte_0x38_uses_DATA_prefix[256] = {
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/* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
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/* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
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/* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
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/* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
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/* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
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/* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
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/* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
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/* d0 */ 0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1, /* df */
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/* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
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/* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
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/* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
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/* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
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/* ------------------------------- */
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/* ------------------------------- */
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@ -1519,7 +1519,7 @@ static const unsigned char threebyte_0x3a_uses_DATA_prefix[256] = {
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/* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
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/* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
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/* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
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/* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
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/* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
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/* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
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/* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
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/* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1, /* df */
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/* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
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/* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
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/* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
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/* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
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/* ------------------------------- */
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/* ------------------------------- */
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@ -390,13 +390,13 @@ typedef struct x86_def_t {
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#define TCG_EXT_FEATURES (CPUID_EXT_SSE3 | CPUID_EXT_PCLMULQDQ | \
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#define TCG_EXT_FEATURES (CPUID_EXT_SSE3 | CPUID_EXT_PCLMULQDQ | \
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CPUID_EXT_MONITOR | CPUID_EXT_SSSE3 | CPUID_EXT_CX16 | \
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CPUID_EXT_MONITOR | CPUID_EXT_SSSE3 | CPUID_EXT_CX16 | \
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CPUID_EXT_SSE41 | CPUID_EXT_SSE42 | CPUID_EXT_POPCNT | \
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CPUID_EXT_SSE41 | CPUID_EXT_SSE42 | CPUID_EXT_POPCNT | \
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CPUID_EXT_MOVBE | CPUID_EXT_HYPERVISOR)
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CPUID_EXT_MOVBE | CPUID_EXT_AES | CPUID_EXT_HYPERVISOR)
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/* missing:
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/* missing:
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CPUID_EXT_DTES64, CPUID_EXT_DSCPL, CPUID_EXT_VMX, CPUID_EXT_SMX,
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CPUID_EXT_DTES64, CPUID_EXT_DSCPL, CPUID_EXT_VMX, CPUID_EXT_SMX,
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CPUID_EXT_EST, CPUID_EXT_TM2, CPUID_EXT_CID, CPUID_EXT_FMA,
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CPUID_EXT_EST, CPUID_EXT_TM2, CPUID_EXT_CID, CPUID_EXT_FMA,
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CPUID_EXT_XTPR, CPUID_EXT_PDCM, CPUID_EXT_PCID, CPUID_EXT_DCA,
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CPUID_EXT_XTPR, CPUID_EXT_PDCM, CPUID_EXT_PCID, CPUID_EXT_DCA,
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CPUID_EXT_X2APIC, CPUID_EXT_TSC_DEADLINE_TIMER, CPUID_EXT_AES,
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CPUID_EXT_X2APIC, CPUID_EXT_TSC_DEADLINE_TIMER, CPUID_EXT_XSAVE,
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CPUID_EXT_XSAVE, CPUID_EXT_OSXSAVE, CPUID_EXT_AVX, CPUID_EXT_F16C,
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CPUID_EXT_OSXSAVE, CPUID_EXT_AVX, CPUID_EXT_F16C,
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CPUID_EXT_RDRAND */
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CPUID_EXT_RDRAND */
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#define TCG_EXT2_FEATURES ((TCG_FEATURES & CPUID_EXT2_AMD_ALIASES) | \
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#define TCG_EXT2_FEATURES ((TCG_FEATURES & CPUID_EXT2_AMD_ALIASES) | \
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CPUID_EXT2_NX | CPUID_EXT2_MMXEXT | CPUID_EXT2_RDTSCP | \
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CPUID_EXT2_NX | CPUID_EXT2_MMXEXT | CPUID_EXT2_RDTSCP | \
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@ -20,6 +20,7 @@
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#include <math.h>
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#include <math.h>
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#include "cpu.h"
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#include "cpu.h"
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#include "helper.h"
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#include "helper.h"
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#include "qemu/aes.h"
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#include "qemu/host-utils.h"
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#include "qemu/host-utils.h"
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#if !defined(CONFIG_USER_ONLY)
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#if !defined(CONFIG_USER_ONLY)
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@ -2203,6 +2203,93 @@ void glue(helper_pclmulqdq, SUFFIX)(CPUX86State *env, Reg *d, Reg *s,
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d->Q(0) = resl;
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d->Q(0) = resl;
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d->Q(1) = resh;
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d->Q(1) = resh;
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}
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}
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/* AES-NI op helpers */
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static const uint8_t aes_shifts[16] = {
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0, 5, 10, 15, 4, 9, 14, 3, 8, 13, 2, 7, 12, 1, 6, 11
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};
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static const uint8_t aes_ishifts[16] = {
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0, 13, 10, 7, 4, 1, 14, 11, 8, 5, 2, 15, 12, 9, 6, 3
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};
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void glue(helper_aesdec, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
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{
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int i;
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Reg st = *d;
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Reg rk = *s;
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for (i = 0 ; i < 4 ; i++) {
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d->L(i) = rk.L(i) ^ bswap32(AES_Td0[st.B(aes_ishifts[4*i+0])] ^
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AES_Td1[st.B(aes_ishifts[4*i+1])] ^
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AES_Td2[st.B(aes_ishifts[4*i+2])] ^
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AES_Td3[st.B(aes_ishifts[4*i+3])]);
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}
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}
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void glue(helper_aesdeclast, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
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{
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int i;
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Reg st = *d;
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Reg rk = *s;
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for (i = 0; i < 16; i++) {
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d->B(i) = rk.B(i) ^ (AES_Td4[st.B(aes_ishifts[i])] & 0xff);
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}
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}
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void glue(helper_aesenc, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
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{
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int i;
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Reg st = *d;
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Reg rk = *s;
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for (i = 0 ; i < 4 ; i++) {
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d->L(i) = rk.L(i) ^ bswap32(AES_Te0[st.B(aes_shifts[4*i+0])] ^
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AES_Te1[st.B(aes_shifts[4*i+1])] ^
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AES_Te2[st.B(aes_shifts[4*i+2])] ^
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AES_Te3[st.B(aes_shifts[4*i+3])]);
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}
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}
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void glue(helper_aesenclast, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
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{
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int i;
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Reg st = *d;
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Reg rk = *s;
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for (i = 0; i < 16; i++) {
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d->B(i) = rk.B(i) ^ (AES_Te4[st.B(aes_shifts[i])] & 0xff);
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}
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}
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void glue(helper_aesimc, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
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{
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int i;
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Reg tmp = *s;
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for (i = 0 ; i < 4 ; i++) {
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d->L(i) = bswap32(AES_Td0[AES_Te4[tmp.B(4*i+0)] & 0xff] ^
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AES_Td1[AES_Te4[tmp.B(4*i+1)] & 0xff] ^
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AES_Td2[AES_Te4[tmp.B(4*i+2)] & 0xff] ^
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AES_Td3[AES_Te4[tmp.B(4*i+3)] & 0xff]);
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}
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}
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void glue(helper_aeskeygenassist, SUFFIX)(CPUX86State *env, Reg *d, Reg *s,
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uint32_t ctrl)
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{
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int i;
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Reg tmp = *s;
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for (i = 0 ; i < 4 ; i++) {
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d->B(i) = AES_Te4[tmp.B(i + 4)] & 0xff;
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d->B(i + 8) = AES_Te4[tmp.B(i + 12)] & 0xff;
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}
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d->L(1) = (d->L(0) << 24 | d->L(0) >> 8) ^ ctrl;
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d->L(3) = (d->L(2) << 24 | d->L(2) >> 8) ^ ctrl;
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}
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#endif
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#endif
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#undef SHIFT
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#undef SHIFT
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@ -338,6 +338,12 @@ DEF_HELPER_3(popcnt, tl, env, tl, i32)
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/* AES-NI op helpers */
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/* AES-NI op helpers */
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#if SHIFT == 1
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#if SHIFT == 1
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DEF_HELPER_3(glue(aesdec, SUFFIX), void, env, Reg, Reg)
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DEF_HELPER_3(glue(aesdeclast, SUFFIX), void, env, Reg, Reg)
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DEF_HELPER_3(glue(aesenc, SUFFIX), void, env, Reg, Reg)
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DEF_HELPER_3(glue(aesenclast, SUFFIX), void, env, Reg, Reg)
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DEF_HELPER_3(glue(aesimc, SUFFIX), void, env, Reg, Reg)
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DEF_HELPER_4(glue(aeskeygenassist, SUFFIX), void, env, Reg, Reg, i32)
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DEF_HELPER_4(glue(pclmulqdq, SUFFIX), void, env, Reg, Reg, i32)
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DEF_HELPER_4(glue(pclmulqdq, SUFFIX), void, env, Reg, Reg, i32)
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#endif
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#endif
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@ -3149,6 +3149,7 @@ struct SSEOpHelper_eppi {
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#define SSE41_SPECIAL { { NULL, SSE_SPECIAL }, CPUID_EXT_SSE41 }
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#define SSE41_SPECIAL { { NULL, SSE_SPECIAL }, CPUID_EXT_SSE41 }
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#define PCLMULQDQ_OP(x) { { NULL, gen_helper_ ## x ## _xmm }, \
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#define PCLMULQDQ_OP(x) { { NULL, gen_helper_ ## x ## _xmm }, \
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CPUID_EXT_PCLMULQDQ }
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CPUID_EXT_PCLMULQDQ }
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#define AESNI_OP(x) { { NULL, gen_helper_ ## x ## _xmm }, CPUID_EXT_AES }
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static const struct SSEOpHelper_epp sse_op_table6[256] = {
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static const struct SSEOpHelper_epp sse_op_table6[256] = {
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[0x00] = SSSE3_OP(pshufb),
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[0x00] = SSSE3_OP(pshufb),
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@ -3197,6 +3198,11 @@ static const struct SSEOpHelper_epp sse_op_table6[256] = {
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[0x3f] = SSE41_OP(pmaxud),
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[0x3f] = SSE41_OP(pmaxud),
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[0x40] = SSE41_OP(pmulld),
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[0x40] = SSE41_OP(pmulld),
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[0x41] = SSE41_OP(phminposuw),
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[0x41] = SSE41_OP(phminposuw),
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[0xdb] = AESNI_OP(aesimc),
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[0xdc] = AESNI_OP(aesenc),
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[0xdd] = AESNI_OP(aesenclast),
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[0xde] = AESNI_OP(aesdec),
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[0xdf] = AESNI_OP(aesdeclast),
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};
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};
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static const struct SSEOpHelper_eppi sse_op_table7[256] = {
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static const struct SSEOpHelper_eppi sse_op_table7[256] = {
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@ -3223,6 +3229,7 @@ static const struct SSEOpHelper_eppi sse_op_table7[256] = {
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[0x61] = SSE42_OP(pcmpestri),
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[0x61] = SSE42_OP(pcmpestri),
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[0x62] = SSE42_OP(pcmpistrm),
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[0x62] = SSE42_OP(pcmpistrm),
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[0x63] = SSE42_OP(pcmpistri),
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[0x63] = SSE42_OP(pcmpistri),
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[0xdf] = AESNI_OP(aeskeygenassist),
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};
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};
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static void gen_sse(CPUX86State *env, DisasContext *s, int b,
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static void gen_sse(CPUX86State *env, DisasContext *s, int b,
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