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pci: move apb specific stuff to apb_pci.c
pci code had a TODO to move apb specific pci bridge initialization to apb_pci. Implement this and remove the TODO. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
This commit is contained in:
parent
be17dc90b5
commit
d6318738c3
22
hw/apb_pci.c
22
hw/apb_pci.c
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@ -182,6 +182,25 @@ static void pci_apb_set_irq(void *opaque, int irq_num, int level)
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qemu_set_irq(pic[irq_num], level);
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qemu_set_irq(pic[irq_num], level);
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}
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}
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static void apb_pci_bridge_init(PCIBus *b)
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{
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PCIDevice *dev = pci_bridge_get_device(b);
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/*
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* command register:
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* According to PCI bridge spec, after reset
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* bus master bit is off
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* memory space enable bit is off
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* According to manual (805-1251.pdf).
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* the reset value should be zero unless the boot pin is tied high
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* (which is true) and thus it should be PCI_COMMAND_MEMORY.
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*/
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pci_set_word(dev->config + PCI_COMMAND,
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PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
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dev->config[PCI_LATENCY_TIMER] = 0x10;
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dev->config[PCI_HEADER_TYPE] |= PCI_HEADER_TYPE_MULTI_FUNCTION;
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}
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PCIBus *pci_apb_init(target_phys_addr_t special_base,
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PCIBus *pci_apb_init(target_phys_addr_t special_base,
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target_phys_addr_t mem_base,
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target_phys_addr_t mem_base,
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qemu_irq *pic, PCIBus **bus2, PCIBus **bus3)
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qemu_irq *pic, PCIBus **bus2, PCIBus **bus3)
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@ -212,10 +231,13 @@ PCIBus *pci_apb_init(target_phys_addr_t special_base,
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PCI_VENDOR_ID_SUN, PCI_DEVICE_ID_SUN_SIMBA,
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PCI_VENDOR_ID_SUN, PCI_DEVICE_ID_SUN_SIMBA,
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pci_apb_map_irq,
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pci_apb_map_irq,
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"Advanced PCI Bus secondary bridge 1");
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"Advanced PCI Bus secondary bridge 1");
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apb_pci_bridge_init(*bus2);
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*bus3 = pci_bridge_init(d->host_state.bus, PCI_DEVFN(1, 1),
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*bus3 = pci_bridge_init(d->host_state.bus, PCI_DEVFN(1, 1),
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PCI_VENDOR_ID_SUN, PCI_DEVICE_ID_SUN_SIMBA,
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PCI_VENDOR_ID_SUN, PCI_DEVICE_ID_SUN_SIMBA,
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pci_apb_map_irq,
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pci_apb_map_irq,
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"Advanced PCI Bus secondary bridge 2");
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"Advanced PCI Bus secondary bridge 2");
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apb_pci_bridge_init(*bus3);
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return d->host_state.bus;
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return d->host_state.bus;
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}
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}
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26
hw/pci.c
26
hw/pci.c
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@ -1217,29 +1217,10 @@ static int pci_bridge_initfn(PCIDevice *dev)
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pci_config_set_vendor_id(s->dev.config, s->vid);
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pci_config_set_vendor_id(s->dev.config, s->vid);
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pci_config_set_device_id(s->dev.config, s->did);
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pci_config_set_device_id(s->dev.config, s->did);
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/* TODO: intial value
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* command register:
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* According to PCI bridge spec, after reset
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* bus master bit is off
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* memory space enable bit is off
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* According to manual (805-1251.pdf).(See abp_pbi.c for its links.)
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* the reset value should be zero unless the boot pin is tied high
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* (which is tru) and thus it should be PCI_COMMAND_MEMORY.
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*
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* For now, don't touch the value.
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* Later command register will be set to zero and apb_pci.c will
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* override the value.
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* Same for latency timer, and multi function bit of header type.
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*/
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pci_set_word(dev->config + PCI_COMMAND,
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PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
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pci_set_word(dev->config + PCI_STATUS,
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pci_set_word(dev->config + PCI_STATUS,
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PCI_STATUS_66MHZ | PCI_STATUS_FAST_BACK);
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PCI_STATUS_66MHZ | PCI_STATUS_FAST_BACK);
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pci_config_set_class(dev->config, PCI_CLASS_BRIDGE_PCI);
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pci_config_set_class(dev->config, PCI_CLASS_BRIDGE_PCI);
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dev->config[PCI_LATENCY_TIMER] = 0x10;
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dev->config[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_BRIDGE;
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dev->config[PCI_HEADER_TYPE] =
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PCI_HEADER_TYPE_MULTI_FUNCTION | PCI_HEADER_TYPE_BRIDGE;
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pci_set_word(dev->config + PCI_SEC_STATUS,
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pci_set_word(dev->config + PCI_SEC_STATUS,
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PCI_STATUS_66MHZ | PCI_STATUS_FAST_BACK);
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PCI_STATUS_66MHZ | PCI_STATUS_FAST_BACK);
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return 0;
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return 0;
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@ -1269,6 +1250,11 @@ PCIBus *pci_bridge_init(PCIBus *bus, int devfn, uint16_t vid, uint16_t did,
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return &s->bus;
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return &s->bus;
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}
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}
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PCIDevice *pci_bridge_get_device(PCIBus *bus)
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{
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return bus->parent_dev;
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}
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static int pci_qdev_init(DeviceState *qdev, DeviceInfo *base)
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static int pci_qdev_init(DeviceState *qdev, DeviceInfo *base)
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{
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{
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PCIDevice *pci_dev = (PCIDevice *)qdev;
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PCIDevice *pci_dev = (PCIDevice *)qdev;
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1
hw/pci.h
1
hw/pci.h
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@ -298,6 +298,7 @@ int pci_read_devaddr(Monitor *mon, const char *addr, int *domp, int *busp,
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void pci_info(Monitor *mon);
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void pci_info(Monitor *mon);
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PCIBus *pci_bridge_init(PCIBus *bus, int devfn, uint16_t vid, uint16_t did,
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PCIBus *pci_bridge_init(PCIBus *bus, int devfn, uint16_t vid, uint16_t did,
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pci_map_irq_fn map_irq, const char *name);
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pci_map_irq_fn map_irq, const char *name);
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PCIDevice *pci_bridge_get_device(PCIBus *bus);
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static inline void
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static inline void
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pci_set_byte(uint8_t *config, uint8_t val)
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pci_set_byte(uint8_t *config, uint8_t val)
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