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vga: virtio reset fix, virtio iommu support.

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Merge remote-tracking branch 'remotes/kraxel/tags/vga-20180903-pull-request' into staging

vga: virtio reset fix, virtio iommu support.

# gpg: Signature made Mon 03 Sep 2018 07:57:32 BST
# gpg:                using RSA key 4CB6D8EED3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>"
# gpg:                 aka "Gerd Hoffmann <gerd@kraxel.org>"
# gpg:                 aka "Gerd Hoffmann (private) <kraxel@gmail.com>"
# Primary key fingerprint: A032 8CFF B93A 17A7 9901  FE7D 4CB6 D8EE D3E8 7138

* remotes/kraxel/tags/vga-20180903-pull-request:
  virtio-gpu: add iommu support
  virtio-gpu: pass down VirtIOGPU pointer to a bunch of functions
  use dpy_gfx_update_full
  Revert "virtio-gpu: fix crashes upon warm reboot with vga mode"
  virtio-vga: fix reset

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2018-09-24 16:15:26 +01:00
parent efd1d5229f 8da132a56f
commit d5a515738e
11 changed files with 53 additions and 63 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

4
hw/display/exynos4210_fimd.c
View file

@ -1272,8 +1272,6 @@ static void exynos4210_fimd_update(void *opaque)
uint8_t *host_fb_addr;
bool is_dirty = false;
const int global_width = (s->vidtcon[2] & FIMD_VIDTCON2_SIZE_MASK) + 1;
const int global_height = ((s->vidtcon[2] >> FIMD_VIDTCON2_VER_SHIFT) &
FIMD_VIDTCON2_SIZE_MASK) + 1;
if (!s || !s->console || !s->enabled ||
surface_bits_per_pixel(qemu_console_surface(s->console)) == 0) {
@ -1329,7 +1327,7 @@ static void exynos4210_fimd_update(void *opaque)
fimd_copy_line_toqemu(global_width, s->ifb + global_width * line *
RGBA_SIZE, d + global_width * line * bpp);
}
dpy_gfx_update(s->console, 0, 0, global_width, global_height);
dpy_gfx_update_full(s->console);
}
s->invalidate = false;
s->vidintcon[1] |= FIMD_VIDINT_INTFRMPEND;

2
hw/display/g364fb.c
View file

@ -229,7 +229,7 @@ static void g364fb_draw_blank(G364State *s)
d += surface_stride(surface);
}
dpy_gfx_update(s->con, 0, 0, s->width, s->height);
dpy_gfx_update_full(s->con);
s->blanked = 1;
}

3
hw/display/jazz_led.c
View file

@ -214,8 +214,7 @@ static void jazz_led_update_display(void *opaque)
}
s->state = REDRAW_NONE;
dpy_gfx_update(s->con, 0, 0,
surface_width(surface), surface_height(surface));
dpy_gfx_update_full(s->con);
}
static void jazz_led_invalidate_display(void *opaque)

4
hw/display/tc6393xb.c
View file

@ -461,7 +461,7 @@ static void tc6393xb_draw_graphic(TC6393xbState *s, int full_update)
return;
}
dpy_gfx_update(s->con, 0, 0, s->scr_width, s->scr_height);
dpy_gfx_update_full(s->con);
}
static void tc6393xb_draw_blank(TC6393xbState *s, int full_update)
@ -480,7 +480,7 @@ static void tc6393xb_draw_blank(TC6393xbState *s, int full_update)
d += surface_stride(surface);
}
dpy_gfx_update(s->con, 0, 0, s->scr_width, s->scr_height);
dpy_gfx_update_full(s->con);
}
static void tc6393xb_update_display(void *opaque)

3
hw/display/vga.c
View file

@ -1745,8 +1745,7 @@ static void vga_draw_blank(VGACommonState *s, int full_update)
memset(d, 0, w);
d += surface_stride(surface);
}
dpy_gfx_update(s->con, 0, 0,
s->last_scr_width, s->last_scr_height);
dpy_gfx_update_full(s->con);
}
#define GMODE_TEXT 0

8
hw/display/virtio-gpu-3d.c
View file

@ -86,7 +86,7 @@ static void virgl_cmd_resource_unref(VirtIOGPU *g,
&res_iovs,
&num_iovs);
if (res_iovs != NULL && num_iovs != 0) {
virtio_gpu_cleanup_mapping_iov(res_iovs, num_iovs);
virtio_gpu_cleanup_mapping_iov(g, res_iovs, num_iovs);
}
virgl_renderer_resource_unref(unref.resource_id);
}
@ -291,7 +291,7 @@ static void virgl_resource_attach_backing(VirtIOGPU *g,
VIRTIO_GPU_FILL_CMD(att_rb);
trace_virtio_gpu_cmd_res_back_attach(att_rb.resource_id);
ret = virtio_gpu_create_mapping_iov(&att_rb, cmd, NULL, &res_iovs);
ret = virtio_gpu_create_mapping_iov(g, &att_rb, cmd, NULL, &res_iovs);
if (ret != 0) {
cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC;
return;
@ -301,7 +301,7 @@ static void virgl_resource_attach_backing(VirtIOGPU *g,
res_iovs, att_rb.nr_entries);
if (ret != 0)
virtio_gpu_cleanup_mapping_iov(res_iovs, att_rb.nr_entries);
virtio_gpu_cleanup_mapping_iov(g, res_iovs, att_rb.nr_entries);
}
static void virgl_resource_detach_backing(VirtIOGPU *g,
@ -320,7 +320,7 @@ static void virgl_resource_detach_backing(VirtIOGPU *g,
if (res_iovs == NULL || num_iovs == 0) {
return;
}
virtio_gpu_cleanup_mapping_iov(res_iovs, num_iovs);
virtio_gpu_cleanup_mapping_iov(g, res_iovs, num_iovs);
}

59
hw/display/virtio-gpu.c
View file

@ -17,6 +17,7 @@
#include "qemu/iov.h"
#include "ui/console.h"
#include "trace.h"
#include "sysemu/dma.h"
#include "hw/virtio/virtio.h"
#include "hw/virtio/virtio-gpu.h"
#include "hw/virtio/virtio-bus.h"
@ -29,7 +30,8 @@
static struct virtio_gpu_simple_resource*
virtio_gpu_find_resource(VirtIOGPU *g, uint32_t resource_id);
static void virtio_gpu_cleanup_mapping(struct virtio_gpu_simple_resource *res);
static void virtio_gpu_cleanup_mapping(VirtIOGPU *g,
struct virtio_gpu_simple_resource *res);
static void
virtio_gpu_ctrl_hdr_bswap(struct virtio_gpu_ctrl_hdr *hdr)
@ -421,11 +423,6 @@ static void virtio_gpu_disable_scanout(VirtIOGPU *g, int scanout_id)
scanout->height ?: 480,
"Guest disabled display.");
}
if (g->disable_scanout) {
g->disable_scanout(g, scanout_id);
}
dpy_gfx_replace_surface(scanout->con, ds);
scanout->resource_id = 0;
scanout->ds = NULL;
@ -447,7 +444,7 @@ static void virtio_gpu_resource_destroy(VirtIOGPU *g,
}
pixman_image_unref(res->image);
virtio_gpu_cleanup_mapping(res);
virtio_gpu_cleanup_mapping(g, res);
QTAILQ_REMOVE(&g->reslist, res, next);
g->hostmem -= res->hostmem;
g_free(res);
@ -693,7 +690,8 @@ static void virtio_gpu_set_scanout(VirtIOGPU *g,
scanout->height = ss.r.height;
}
int virtio_gpu_create_mapping_iov(struct virtio_gpu_resource_attach_backing *ab,
int virtio_gpu_create_mapping_iov(VirtIOGPU *g,
struct virtio_gpu_resource_attach_backing *ab,
struct virtio_gpu_ctrl_command *cmd,
uint64_t **addr, struct iovec **iov)
{
@ -729,7 +727,8 @@ int virtio_gpu_create_mapping_iov(struct virtio_gpu_resource_attach_backing *ab,
uint32_t l = le32_to_cpu(ents[i].length);
hwaddr len = l;
(*iov)[i].iov_len = l;
(*iov)[i].iov_base = cpu_physical_memory_map(a, &len, 1);
(*iov)[i].iov_base = dma_memory_map(VIRTIO_DEVICE(g)->dma_as,
a, &len, DMA_DIRECTION_TO_DEVICE);
if (addr) {
(*addr)[i] = a;
}
@ -737,7 +736,7 @@ int virtio_gpu_create_mapping_iov(struct virtio_gpu_resource_attach_backing *ab,
qemu_log_mask(LOG_GUEST_ERROR, "%s: failed to map MMIO memory for"
" resource %d element %d\n",
__func__, ab->resource_id, i);
virtio_gpu_cleanup_mapping_iov(*iov, i);
virtio_gpu_cleanup_mapping_iov(g, *iov, i);
g_free(ents);
*iov = NULL;
if (addr) {
@ -751,20 +750,24 @@ int virtio_gpu_create_mapping_iov(struct virtio_gpu_resource_attach_backing *ab,
return 0;
}
void virtio_gpu_cleanup_mapping_iov(struct iovec *iov, uint32_t count)
void virtio_gpu_cleanup_mapping_iov(VirtIOGPU *g,
struct iovec *iov, uint32_t count)
{
int i;
for (i = 0; i < count; i++) {
cpu_physical_memory_unmap(iov[i].iov_base, iov[i].iov_len, 1,
iov[i].iov_len);
dma_memory_unmap(VIRTIO_DEVICE(g)->dma_as,
iov[i].iov_base, iov[i].iov_len,
DMA_DIRECTION_TO_DEVICE,
iov[i].iov_len);
}
g_free(iov);
}
static void virtio_gpu_cleanup_mapping(struct virtio_gpu_simple_resource *res)
static void virtio_gpu_cleanup_mapping(VirtIOGPU *g,
struct virtio_gpu_simple_resource *res)
{
virtio_gpu_cleanup_mapping_iov(res->iov, res->iov_cnt);
virtio_gpu_cleanup_mapping_iov(g, res->iov, res->iov_cnt);
res->iov = NULL;
res->iov_cnt = 0;
g_free(res->addrs);
@ -796,7 +799,7 @@ virtio_gpu_resource_attach_backing(VirtIOGPU *g,
return;
}
ret = virtio_gpu_create_mapping_iov(&ab, cmd, &res->addrs, &res->iov);
ret = virtio_gpu_create_mapping_iov(g, &ab, cmd, &res->addrs, &res->iov);
if (ret != 0) {
cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC;
return;
@ -823,7 +826,7 @@ virtio_gpu_resource_detach_backing(VirtIOGPU *g,
cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID;
return;
}
virtio_gpu_cleanup_mapping(res);
virtio_gpu_cleanup_mapping(g, res);
}
static void virtio_gpu_simple_process_cmd(VirtIOGPU *g,
@ -1148,16 +1151,21 @@ static int virtio_gpu_load(QEMUFile *f, void *opaque, size_t size,
for (i = 0; i < res->iov_cnt; i++) {
hwaddr len = res->iov[i].iov_len;
res->iov[i].iov_base =
cpu_physical_memory_map(res->addrs[i], &len, 1);
dma_memory_map(VIRTIO_DEVICE(g)->dma_as,
res->addrs[i], &len, DMA_DIRECTION_TO_DEVICE);
if (!res->iov[i].iov_base || len != res->iov[i].iov_len) {
/* Clean up the half-a-mapping we just created... */
if (res->iov[i].iov_base) {
cpu_physical_memory_unmap(res->iov[i].iov_base,
len, 0, 0);
dma_memory_unmap(VIRTIO_DEVICE(g)->dma_as,
res->iov[i].iov_base,
res->iov[i].iov_len,
DMA_DIRECTION_TO_DEVICE,
res->iov[i].iov_len);
}
/* ...and the mappings for previous loop iterations */
res->iov_cnt = i;
virtio_gpu_cleanup_mapping(res);
virtio_gpu_cleanup_mapping(g, res);
pixman_image_unref(res->image);
g_free(res);
return -EINVAL;
@ -1187,7 +1195,7 @@ static int virtio_gpu_load(QEMUFile *f, void *opaque, size_t size,
}
dpy_gfx_replace_surface(scanout->con, scanout->ds);
dpy_gfx_update(scanout->con, 0, 0, scanout->width, scanout->height);
dpy_gfx_update_full(scanout->con);
if (scanout->cursor.resource_id) {
update_cursor(g, &scanout->cursor);
}
@ -1205,11 +1213,6 @@ static void virtio_gpu_device_realize(DeviceState *qdev, Error **errp)
Error *local_err = NULL;
int i;
if (virtio_host_has_feature(vdev, VIRTIO_F_IOMMU_PLATFORM)) {
error_setg(errp, "virtio-gpu does not support vIOMMU yet");
return;
}
if (g->conf.max_outputs > VIRTIO_GPU_MAX_SCANOUTS) {
error_setg(errp, "invalid max_outputs > %d", VIRTIO_GPU_MAX_SCANOUTS);
return;
@ -1289,7 +1292,7 @@ static void virtio_gpu_instance_init(Object *obj)
{
}
static void virtio_gpu_reset(VirtIODevice *vdev)
void virtio_gpu_reset(VirtIODevice *vdev)
{
VirtIOGPU *g = VIRTIO_GPU(vdev);
struct virtio_gpu_simple_resource *res, *tmp;

17
hw/display/virtio-vga.c
View file

@ -75,16 +75,6 @@ static void virtio_vga_gl_block(void *opaque, bool block)
}
}
static void virtio_vga_disable_scanout(VirtIOGPU *g, int scanout_id)
{
VirtIOVGA *vvga = container_of(g, VirtIOVGA, vdev);
if (scanout_id == 0) {
/* reset surface if needed */
vvga->vga.graphic_mode = -1;
}
}
static const GraphicHwOps virtio_vga_ops = {
.invalidate = virtio_vga_invalidate_display,
.gfx_update = virtio_vga_update_display,
@ -166,7 +156,6 @@ static void virtio_vga_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
vvga->vga_mrs, true);
vga->con = g->scanout[0].con;
g->disable_scanout = virtio_vga_disable_scanout;
graphic_console_set_hwops(vga->con, &virtio_vga_ops, vvga);
for (i = 0; i < g->conf.max_outputs; i++) {
@ -179,8 +168,12 @@ static void virtio_vga_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
static void virtio_vga_reset(DeviceState *dev)
{
VirtIOVGA *vvga = VIRTIO_VGA(dev);
vvga->vdev.enable = 0;
/* reset virtio-gpu */
virtio_gpu_reset(VIRTIO_DEVICE(&vvga->vdev));
/* reset vga */
vga_common_reset(&vvga->vga);
vga_dirty_log_start(&vvga->vga);
}

5
hw/display/vmware_vga.c
View file

@ -1116,7 +1116,6 @@ static inline void vmsvga_check_size(struct vmsvga_state_s *s)
static void vmsvga_update_display(void *opaque)
{
struct vmsvga_state_s *s = opaque;
DisplaySurface *surface;
if (!s->enable || !s->config) {
/* in standard vga mode */
@ -1125,15 +1124,13 @@ static void vmsvga_update_display(void *opaque)
}
vmsvga_check_size(s);
surface = qemu_console_surface(s->vga.con);
vmsvga_fifo_run(s);
vmsvga_update_rect_flush(s);
if (s->invalidated) {
s->invalidated = 0;
dpy_gfx_update(s->vga.con, 0, 0,
surface_width(surface), surface_height(surface));
dpy_gfx_update_full(s->vga.con);
}
}

3
hw/display/xlnx_dp.c
View file

@ -1186,8 +1186,7 @@ static void xlnx_dp_update_display(void *opaque)
/*
* XXX: We might want to update only what changed.
*/
dpy_gfx_update(s->console, 0, 0, surface_width(s->g_plane.surface),
surface_height(s->g_plane.surface));
dpy_gfx_update_full(s->console);
}
static const GraphicHwOps xlnx_dp_gfx_ops = {

8
include/hw/virtio/virtio-gpu.h
View file

@ -125,7 +125,6 @@ typedef struct VirtIOGPU {
uint32_t bytes_3d;
} stats;
void (*disable_scanout)(struct VirtIOGPU *g, int scanout_id);
Error *migration_blocker;
} VirtIOGPU;
@ -150,6 +149,7 @@ extern const GraphicHwOps virtio_gpu_ops;
} while (0)
/* virtio-gpu.c */
void virtio_gpu_reset(VirtIODevice *vdev);
void virtio_gpu_ctrl_response(VirtIOGPU *g,
struct virtio_gpu_ctrl_command *cmd,
struct virtio_gpu_ctrl_hdr *resp,
@ -159,10 +159,12 @@ void virtio_gpu_ctrl_response_nodata(VirtIOGPU *g,
enum virtio_gpu_ctrl_type type);
void virtio_gpu_get_display_info(VirtIOGPU *g,
struct virtio_gpu_ctrl_command *cmd);
int virtio_gpu_create_mapping_iov(struct virtio_gpu_resource_attach_backing *ab,
int virtio_gpu_create_mapping_iov(VirtIOGPU *g,
struct virtio_gpu_resource_attach_backing *ab,
struct virtio_gpu_ctrl_command *cmd,
uint64_t **addr, struct iovec **iov);
void virtio_gpu_cleanup_mapping_iov(struct iovec *iov, uint32_t count);
void virtio_gpu_cleanup_mapping_iov(VirtIOGPU *g,
struct iovec *iov, uint32_t count);
void virtio_gpu_process_cmdq(VirtIOGPU *g);
/* virtio-gpu-3d.c */