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intel-iommu: trace domain id during page walk
This patch only modifies the trace points. Previously we were tracing page walk levels. They are redundant since we have page mask (size) already. Now we trace something much more useful which is the domain ID of the page walking. That can be very useful when we trace more than one devices on the same system, so that we can know which map is for which domain. CC: QEMU Stable <qemu-stable@nongnu.org> Signed-off-by: Peter Xu <peterx@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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@ -756,6 +756,7 @@ typedef int (*vtd_page_walk_hook)(IOMMUTLBEntry *entry, void *private);
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* @notify_unmap: whether we should notify invalid entries
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* @as: VT-d address space of the device
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* @aw: maximum address width
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* @domain: domain ID of the page walk
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*/
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typedef struct {
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VTDAddressSpace *as;
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@ -763,17 +764,18 @@ typedef struct {
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void *private;
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bool notify_unmap;
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uint8_t aw;
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uint16_t domain_id;
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} vtd_page_walk_info;
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static int vtd_page_walk_one(IOMMUTLBEntry *entry, int level,
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vtd_page_walk_info *info)
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static int vtd_page_walk_one(IOMMUTLBEntry *entry, vtd_page_walk_info *info)
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{
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vtd_page_walk_hook hook_fn = info->hook_fn;
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void *private = info->private;
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assert(hook_fn);
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trace_vtd_page_walk_one(level, entry->iova, entry->translated_addr,
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entry->addr_mask, entry->perm);
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trace_vtd_page_walk_one(info->domain_id, entry->iova,
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entry->translated_addr, entry->addr_mask,
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entry->perm);
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return hook_fn(entry, private);
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}
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@ -844,7 +846,7 @@ static int vtd_page_walk_level(dma_addr_t addr, uint64_t start,
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trace_vtd_page_walk_skip_perm(iova, iova_next);
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goto next;
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}
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ret = vtd_page_walk_one(&entry, level, info);
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ret = vtd_page_walk_one(&entry, info);
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if (ret < 0) {
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return ret;
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}
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@ -856,7 +858,7 @@ static int vtd_page_walk_level(dma_addr_t addr, uint64_t start,
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* Translated address is meaningless, zero it.
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*/
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entry.translated_addr = 0x0;
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ret = vtd_page_walk_one(&entry, level, info);
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ret = vtd_page_walk_one(&entry, info);
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if (ret < 0) {
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return ret;
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}
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@ -1466,6 +1468,7 @@ static void vtd_iotlb_page_invalidate_notify(IntelIOMMUState *s,
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.notify_unmap = true,
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.aw = s->aw_bits,
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.as = vtd_as,
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.domain_id = domain_id,
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};
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/*
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@ -2947,6 +2950,7 @@ static void vtd_iommu_replay(IOMMUMemoryRegion *iommu_mr, IOMMUNotifier *n)
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.notify_unmap = false,
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.aw = s->aw_bits,
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.as = vtd_as,
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.domain_id = VTD_CONTEXT_ENTRY_DID(ce.hi),
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};
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vtd_page_walk(&ce, 0, ~0ULL, &info);
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@ -39,7 +39,7 @@ vtd_fault_disabled(void) "Fault processing disabled for context entry"
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vtd_replay_ce_valid(uint8_t bus, uint8_t dev, uint8_t fn, uint16_t domain, uint64_t hi, uint64_t lo) "replay valid context device %02"PRIx8":%02"PRIx8".%02"PRIx8" domain 0x%"PRIx16" hi 0x%"PRIx64" lo 0x%"PRIx64
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vtd_replay_ce_invalid(uint8_t bus, uint8_t dev, uint8_t fn) "replay invalid context device %02"PRIx8":%02"PRIx8".%02"PRIx8
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vtd_page_walk_level(uint64_t addr, uint32_t level, uint64_t start, uint64_t end) "walk (base=0x%"PRIx64", level=%"PRIu32") iova range 0x%"PRIx64" - 0x%"PRIx64
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vtd_page_walk_one(uint32_t level, uint64_t iova, uint64_t gpa, uint64_t mask, int perm) "detected page level 0x%"PRIx32" iova 0x%"PRIx64" -> gpa 0x%"PRIx64" mask 0x%"PRIx64" perm %d"
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vtd_page_walk_one(uint16_t domain, uint64_t iova, uint64_t gpa, uint64_t mask, int perm) "domain 0x%"PRIu16" iova 0x%"PRIx64" -> gpa 0x%"PRIx64" mask 0x%"PRIx64" perm %d"
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vtd_page_walk_skip_read(uint64_t iova, uint64_t next) "Page walk skip iova 0x%"PRIx64" - 0x%"PRIx64" due to unable to read"
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vtd_page_walk_skip_perm(uint64_t iova, uint64_t next) "Page walk skip iova 0x%"PRIx64" - 0x%"PRIx64" due to perm empty"
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vtd_page_walk_skip_reserve(uint64_t iova, uint64_t next) "Page walk skip iova 0x%"PRIx64" - 0x%"PRIx64" due to rsrv set"
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