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bsd-user:Add AArch64 improvements and signal handling functions

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Added get_ucontext_sigreturn function to check processor state ensuring current execution mode is EL0 and no flags
indicating interrupts or exceptions are set.
Updated AArch64 code to use CF directly without reading/writing the entire processor state, improving efficiency.
Changed FP data structures to use Int128 instead of __uint128_t, leveraging QEMU's generic mechanism for referencing this type.

Signed-off-by: Stacey Son <sson@FreeBSD.org>
Signed-off-by: Ajeet Singh <itachis@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20240707191128.10509-9-itachis@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
This commit is contained in:
Stacey Son 2024-07-08 00:41:28 +05:30 committed by Warner Losh
parent dadfc6d5df
commit ce6c541dcb
5 changed files with 26 additions and 8 deletions
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20
bsd-user/aarch64/signal.c
View file

@ -21,7 +21,7 @@
#include "qemu.h"
/*
* Compare to sendsig() in sys/arm64/arm64/machdep.c
* Compare to sendsig() in sys/arm64/arm64/exec_machdep.c
* Assumes that target stack frame memory is locked.
*/
abi_long set_sigtramp_args(CPUARMState *regs, int sig,
@ -117,3 +117,21 @@ abi_long set_mcontext(CPUARMState *regs, target_mcontext_t *mcp, int srflag)
return err;
}
/* Compare to sys_sigreturn() in arm64/arm64/machdep.c */
abi_long get_ucontext_sigreturn(CPUARMState *regs, abi_ulong target_sf,
abi_ulong *target_uc)
{
uint32_t pstate = pstate_read(regs);
*target_uc = 0;
if ((pstate & PSTATE_M) != PSTATE_MODE_EL0t ||
(pstate & (PSTATE_F | PSTATE_I | PSTATE_A | PSTATE_D)) != 0) {
return -TARGET_EINVAL;
}
*target_uc = target_sf;
return 0;
}

7
bsd-user/aarch64/target_arch_cpu.h
View file

@ -48,7 +48,6 @@ static inline void target_cpu_loop(CPUARMState *env)
CPUState *cs = env_cpu(env);
int trapnr, ec, fsc, si_code, si_signo;
uint64_t code, arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8;
uint32_t pstate;
abi_long ret;
for (;;) {
@ -88,18 +87,16 @@ static inline void target_cpu_loop(CPUARMState *env)
* The carry bit is cleared for no error; set for error.
* See arm64/arm64/vm_machdep.c cpu_set_syscall_retval()
*/
pstate = pstate_read(env);
if (ret >= 0) {
pstate &= ~PSTATE_C;
env->CF = 0;
env->xregs[0] = ret;
} else if (ret == -TARGET_ERESTART) {
env->pc -= 4;
break;
} else if (ret != -TARGET_EJUSTRETURN) {
pstate |= PSTATE_C;
env->CF = 1;
env->xregs[0] = -ret;
}
pstate_write(env, pstate);
break;
case EXCP_INTERRUPT:

2
bsd-user/aarch64/target_arch_reg.h
View file

@ -31,7 +31,7 @@ typedef struct target_reg {
} target_reg_t;
typedef struct target_fpreg {
__uint128_t fp_q[32];
Int128 fp_q[32];
uint32_t fp_sr;
uint32_t fp_cr;
} target_fpreg_t;

2
bsd-user/aarch64/target_arch_signal.h
View file

@ -49,7 +49,7 @@ struct target_gpregs {
};
struct target_fpregs {
__uint128_t fp_q[32];
Int128 fp_q[32];
uint32_t fp_sr;
uint32_t fp_cr;
uint32_t fp_flags;

3
bsd-user/qemu.h
View file

@ -17,6 +17,9 @@
#ifndef QEMU_H
#define QEMU_H
#include <sys/param.h>
#include "qemu/int128.h"
#include "cpu.h"
#include "qemu/units.h"
#include "exec/cpu_ldst.h"