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q35: expose mmcfg size as a property
Address is already exposed, expose size for symmetry. Reviewed-by: Gerd Hoffmann <kraxel@redhat.com> Tested-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Tested-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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@ -109,6 +109,16 @@ static void q35_host_get_pci_hole64_end(Object *obj, Visitor *v,
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visit_type_uint64(v, &w64.end, name, errp);
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}
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static void q35_host_get_mmcfg_size(Object *obj, Visitor *v,
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void *opaque, const char *name,
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Error **errp)
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{
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PCIExpressHost *e = PCIE_HOST_BRIDGE(obj);
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uint32_t value = e->size;
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visit_type_uint32(v, &value, name, errp);
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}
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static Property mch_props[] = {
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DEFINE_PROP_UINT64(PCIE_HOST_MCFG_BASE, Q35PCIHost, parent_obj.base_addr,
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MCH_HOST_BRIDGE_PCIEXBAR_DEFAULT),
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@ -160,6 +170,10 @@ static void q35_host_initfn(Object *obj)
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q35_host_get_pci_hole64_end,
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NULL, NULL, NULL, NULL);
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object_property_add(obj, PCIE_HOST_MCFG_SIZE, "int",
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q35_host_get_mmcfg_size,
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NULL, NULL, NULL, NULL);
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/* Leave enough space for the biggest MCFG BAR */
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/* TODO: this matches current bios behaviour, but
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* it's not a power of two, which means an MTRR
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@ -29,6 +29,7 @@
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OBJECT_CHECK(PCIExpressHost, (obj), TYPE_PCIE_HOST_BRIDGE)
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#define PCIE_HOST_MCFG_BASE "MCFG"
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#define PCIE_HOST_MCFG_SIZE "mcfg_size"
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/* pcie_host::base_addr == PCIE_BASE_ADDR_UNMAPPED when it isn't mapped. */
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#define PCIE_BASE_ADDR_UNMAPPED ((hwaddr)-1ULL)
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