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target/mips: Restrict mmu_init() to TCG
mmu_init() is only required by TCG accelerator. Restrict its declaration and call to TCG. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210428170410.479308-21-f4bug@amsat.org>
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c284201702
3 changed files with 3 additions and 4 deletions
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@ -708,7 +708,7 @@ static void mips_cpu_realizefn(DeviceState *dev, Error **errp)
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env->exception_base = (int32_t)0xBFC00000;
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#ifndef CONFIG_USER_ONLY
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#if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY)
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mmu_init(env, env->cpu_model);
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#endif
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fpu_init(env, env->cpu_model);
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@ -233,9 +233,6 @@ void cpu_mips_store_compare(CPUMIPSState *env, uint32_t value);
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void cpu_mips_start_count(CPUMIPSState *env);
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void cpu_mips_stop_count(CPUMIPSState *env);
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/* helper.c */
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void mmu_init(CPUMIPSState *env, const mips_def_t *def);
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static inline void mips_env_set_pc(CPUMIPSState *env, target_ulong value)
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{
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env->active_tc.PC = value & ~(target_ulong)1;
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@ -20,6 +20,8 @@ bool mips_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
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#if !defined(CONFIG_USER_ONLY)
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void mmu_init(CPUMIPSState *env, const mips_def_t *def);
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void update_pagemask(CPUMIPSState *env, target_ulong arg1, int32_t *pagemask);
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uint32_t cpu_mips_get_random(CPUMIPSState *env);
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