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target/arm: Add is_secure parameter to get_phys_addr_lpae

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Remove the use of regime_is_secure from get_phys_addr_lpae,
using the new parameter instead.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20221001162318.153420-3-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson 2022-10-01 09:22:38 -07:00 committed by Peter Maydell
parent 9b5ba97ac7
commit c23f08a56c
1 changed files with 10 additions and 10 deletions
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20
target/arm/ptw.c
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@ -16,8 +16,8 @@
static bool get_phys_addr_lpae(CPUARMState *env, uint64_t address, static bool get_phys_addr_lpae(CPUARMState *env, uint64_t address,
MMUAccessType access_type, ARMMMUIdx mmu_idx, MMUAccessType access_type, ARMMMUIdx mmu_idx,
bool s1_is_el0, GetPhysAddrResult *result, bool is_secure, bool s1_is_el0,
ARMMMUFaultInfo *fi) GetPhysAddrResult *result, ARMMMUFaultInfo *fi)
__attribute__((nonnull)); __attribute__((nonnull));
/* This mapping is common between ID_AA64MMFR0.PARANGE and TCR_ELx.{I}PS. */ /* This mapping is common between ID_AA64MMFR0.PARANGE and TCR_ELx.{I}PS. */
@ -207,8 +207,8 @@ static hwaddr S1_ptw_translate(CPUARMState *env, ARMMMUIdx mmu_idx,
GetPhysAddrResult s2 = {}; GetPhysAddrResult s2 = {};
int ret; int ret;
ret = get_phys_addr_lpae(env, addr, MMU_DATA_LOAD, s2_mmu_idx, false, ret = get_phys_addr_lpae(env, addr, MMU_DATA_LOAD, s2_mmu_idx,
&s2, fi); *is_secure, false, &s2, fi);
if (ret) { if (ret) {
assert(fi->type != ARMFault_None); assert(fi->type != ARMFault_None);
fi->s2addr = addr; fi->s2addr = addr;
@ -965,8 +965,8 @@ static bool check_s2_mmu_setup(ARMCPU *cpu, bool is_aa64, int level,
*/ */
static bool get_phys_addr_lpae(CPUARMState *env, uint64_t address, static bool get_phys_addr_lpae(CPUARMState *env, uint64_t address,
MMUAccessType access_type, ARMMMUIdx mmu_idx, MMUAccessType access_type, ARMMMUIdx mmu_idx,
bool s1_is_el0, GetPhysAddrResult *result, bool is_secure, bool s1_is_el0,
ARMMMUFaultInfo *fi) GetPhysAddrResult *result, ARMMMUFaultInfo *fi)
{ {
ARMCPU *cpu = env_archcpu(env); ARMCPU *cpu = env_archcpu(env);
/* Read an LPAE long-descriptor translation table. */ /* Read an LPAE long-descriptor translation table. */
@ -1183,7 +1183,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, uint64_t address,
* remain non-secure. We implement this by just ORing in the NSTable/NS * remain non-secure. We implement this by just ORing in the NSTable/NS
* bits at each step. * bits at each step.
*/ */
tableattrs = regime_is_secure(env, mmu_idx) ? 0 : (1 << 4); tableattrs = is_secure ? 0 : (1 << 4);
for (;;) { for (;;) {
uint64_t descriptor; uint64_t descriptor;
bool nstable; bool nstable;
@ -2337,7 +2337,7 @@ bool get_phys_addr(CPUARMState *env, target_ulong address,
memset(result, 0, sizeof(*result)); memset(result, 0, sizeof(*result));
ret = get_phys_addr_lpae(env, ipa, access_type, s2_mmu_idx, ret = get_phys_addr_lpae(env, ipa, access_type, s2_mmu_idx,
is_el0, result, fi); s2walk_secure, is_el0, result, fi);
fi->s2addr = ipa; fi->s2addr = ipa;
/* Combine the S1 and S2 perms. */ /* Combine the S1 and S2 perms. */
@ -2504,8 +2504,8 @@ bool get_phys_addr(CPUARMState *env, target_ulong address,
} }
if (regime_using_lpae_format(env, mmu_idx)) { if (regime_using_lpae_format(env, mmu_idx)) {
return get_phys_addr_lpae(env, address, access_type, mmu_idx, false, return get_phys_addr_lpae(env, address, access_type, mmu_idx,
result, fi); is_secure, false, result, fi);
} else if (regime_sctlr(env, mmu_idx) & SCTLR_XP) { } else if (regime_sctlr(env, mmu_idx) & SCTLR_XP) {
return get_phys_addr_v6(env, address, access_type, mmu_idx, return get_phys_addr_v6(env, address, access_type, mmu_idx,
is_secure, result, fi); is_secure, result, fi);