mirror of
https://gitlab.com/qemu-project/qemu
synced 2024-11-05 20:35:44 +00:00
target/mips: msa: Unroll loops and demacro <BMNZ|BMZ|BSEL>.V
Achieves clearer code and slightly better performance. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1569415572-19635-11-git-send-email-aleksandar.markovic@rt-rk.com>
This commit is contained in:
parent
2e3eddb084
commit
c1ed3038e7
2 changed files with 43 additions and 27 deletions
|
@ -803,6 +803,10 @@ DEF_HELPER_4(msa_binsr_h, void, env, i32, i32, i32)
|
|||
DEF_HELPER_4(msa_binsr_w, void, env, i32, i32, i32)
|
||||
DEF_HELPER_4(msa_binsr_d, void, env, i32, i32, i32)
|
||||
|
||||
DEF_HELPER_4(msa_bmnz_v, void, env, i32, i32, i32)
|
||||
DEF_HELPER_4(msa_bmz_v, void, env, i32, i32, i32)
|
||||
DEF_HELPER_4(msa_bsel_v, void, env, i32, i32, i32)
|
||||
|
||||
|
||||
DEF_HELPER_4(msa_andi_b, void, env, i32, i32, i32)
|
||||
DEF_HELPER_4(msa_ori_b, void, env, i32, i32, i32)
|
||||
|
@ -957,9 +961,6 @@ DEF_HELPER_4(msa_and_v, void, env, i32, i32, i32)
|
|||
DEF_HELPER_4(msa_or_v, void, env, i32, i32, i32)
|
||||
DEF_HELPER_4(msa_nor_v, void, env, i32, i32, i32)
|
||||
DEF_HELPER_4(msa_xor_v, void, env, i32, i32, i32)
|
||||
DEF_HELPER_4(msa_bmnz_v, void, env, i32, i32, i32)
|
||||
DEF_HELPER_4(msa_bmz_v, void, env, i32, i32, i32)
|
||||
DEF_HELPER_4(msa_bsel_v, void, env, i32, i32, i32)
|
||||
DEF_HELPER_4(msa_fill_df, void, env, i32, i32, i32)
|
||||
|
||||
DEF_HELPER_4(msa_copy_s_b, void, env, i32, i32, i32)
|
||||
|
|
|
@ -466,6 +466,42 @@ void helper_msa_binsr_d(CPUMIPSState *env,
|
|||
pwd->d[1] = msa_binsr_df(DF_DOUBLE, pwd->d[1], pws->d[1], pwt->d[1]);
|
||||
}
|
||||
|
||||
void helper_msa_bmnz_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
|
||||
{
|
||||
wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
|
||||
wr_t *pws = &(env->active_fpu.fpr[ws].wr);
|
||||
wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
|
||||
|
||||
pwd->d[0] = UNSIGNED( \
|
||||
((pwd->d[0] & (~pwt->d[0])) | (pws->d[0] & pwt->d[0])), DF_DOUBLE);
|
||||
pwd->d[1] = UNSIGNED( \
|
||||
((pwd->d[1] & (~pwt->d[1])) | (pws->d[1] & pwt->d[1])), DF_DOUBLE);
|
||||
}
|
||||
|
||||
void helper_msa_bmz_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
|
||||
{
|
||||
wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
|
||||
wr_t *pws = &(env->active_fpu.fpr[ws].wr);
|
||||
wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
|
||||
|
||||
pwd->d[0] = UNSIGNED( \
|
||||
((pwd->d[0] & pwt->d[0]) | (pws->d[0] & (~pwt->d[0]))), DF_DOUBLE);
|
||||
pwd->d[1] = UNSIGNED( \
|
||||
((pwd->d[1] & pwt->d[1]) | (pws->d[1] & (~pwt->d[1]))), DF_DOUBLE);
|
||||
}
|
||||
|
||||
void helper_msa_bsel_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
|
||||
{
|
||||
wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
|
||||
wr_t *pws = &(env->active_fpu.fpr[ws].wr);
|
||||
wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
|
||||
|
||||
pwd->d[0] = UNSIGNED( \
|
||||
(pws->d[0] & (~pwd->d[0])) | (pwt->d[0] & pwd->d[0]), DF_DOUBLE);
|
||||
pwd->d[1] = UNSIGNED( \
|
||||
(pws->d[1] & (~pwd->d[1])) | (pwt->d[1] & pwd->d[1]), DF_DOUBLE);
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Bit Set
|
||||
|
@ -946,6 +982,9 @@ MSA_FN_IMM8(bmzi_b, pwd->b[i],
|
|||
MSA_FN_IMM8(bseli_b, pwd->b[i],
|
||||
BIT_SELECT(pwd->b[i], pws->b[i], i8, DF_BYTE))
|
||||
|
||||
#undef BIT_SELECT
|
||||
#undef BIT_MOVE_IF_ZERO
|
||||
#undef BIT_MOVE_IF_NOT_ZERO
|
||||
#undef MSA_FN_IMM8
|
||||
|
||||
#define SHF_POS(i, imm) (((i) & 0xfc) + (((imm) >> (2 * ((i) & 0x03))) & 0x03))
|
||||
|
@ -980,30 +1019,6 @@ void helper_msa_shf_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
|
|||
msa_move_v(pwd, pwx);
|
||||
}
|
||||
|
||||
#define MSA_FN_VECTOR(FUNC, DEST, OPERATION) \
|
||||
void helper_msa_ ## FUNC(CPUMIPSState *env, uint32_t wd, uint32_t ws, \
|
||||
uint32_t wt) \
|
||||
{ \
|
||||
wr_t *pwd = &(env->active_fpu.fpr[wd].wr); \
|
||||
wr_t *pws = &(env->active_fpu.fpr[ws].wr); \
|
||||
wr_t *pwt = &(env->active_fpu.fpr[wt].wr); \
|
||||
uint32_t i; \
|
||||
for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { \
|
||||
DEST = OPERATION; \
|
||||
} \
|
||||
}
|
||||
|
||||
MSA_FN_VECTOR(bmnz_v, pwd->d[i],
|
||||
BIT_MOVE_IF_NOT_ZERO(pwd->d[i], pws->d[i], pwt->d[i], DF_DOUBLE))
|
||||
MSA_FN_VECTOR(bmz_v, pwd->d[i],
|
||||
BIT_MOVE_IF_ZERO(pwd->d[i], pws->d[i], pwt->d[i], DF_DOUBLE))
|
||||
MSA_FN_VECTOR(bsel_v, pwd->d[i],
|
||||
BIT_SELECT(pwd->d[i], pws->d[i], pwt->d[i], DF_DOUBLE))
|
||||
#undef BIT_MOVE_IF_NOT_ZERO
|
||||
#undef BIT_MOVE_IF_ZERO
|
||||
#undef BIT_SELECT
|
||||
#undef MSA_FN_VECTOR
|
||||
|
||||
void helper_msa_and_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
|
||||
{
|
||||
wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
|
||||
|
|
Loading…
Reference in a new issue