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hw/intc/loongarch_ipi: Fix mail send and any send function
By the document of ipi mailsend device, byte is written only when the mask bit is 0. The original code discards mask bit and overwrite the data always, this patch fixes the issue. Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Message-Id: <20220705064901.2353349-3-yangxiaojuan@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -50,35 +50,45 @@ static uint64_t loongarch_ipi_readl(void *opaque, hwaddr addr, unsigned size)
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return ret;
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}
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static int get_ipi_data(target_ulong val)
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static void send_ipi_data(CPULoongArchState *env, target_ulong val, target_ulong addr)
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{
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int i, mask, data;
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int i, mask = 0, data = 0;
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data = val >> 32;
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mask = (val >> 27) & 0xf;
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for (i = 0; i < 4; i++) {
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if ((mask >> i) & 1) {
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data &= ~(0xff << (i * 8));
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/*
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* bit 27-30 is mask for byte writing,
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* if the mask is 0, we need not to do anything.
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*/
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if ((val >> 27) & 0xf) {
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data = address_space_ldl(&env->address_space_iocsr, addr,
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MEMTXATTRS_UNSPECIFIED, NULL);
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for (i = 0; i < 4; i++) {
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/* get mask for byte writing */
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if (val & (0x1 << (27 + i))) {
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mask |= 0xff << (i * 8);
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}
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}
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}
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return data;
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data &= mask;
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data |= (val >> 32) & ~mask;
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address_space_stl(&env->address_space_iocsr, addr,
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data, MEMTXATTRS_UNSPECIFIED, NULL);
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}
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static void ipi_send(uint64_t val)
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{
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int cpuid, data;
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CPULoongArchState *env;
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CPUState *cs;
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LoongArchCPU *cpu;
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cpuid = (val >> 16) & 0x3ff;
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/* IPI status vector */
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data = 1 << (val & 0x1f);
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qemu_mutex_lock_iothread();
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CPUState *cs = qemu_get_cpu(cpuid);
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LoongArchCPU *cpu = LOONGARCH_CPU(cs);
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cs = qemu_get_cpu(cpuid);
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cpu = LOONGARCH_CPU(cs);
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env = &cpu->env;
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loongarch_cpu_set_irq(cpu, IRQ_IPI, 1);
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qemu_mutex_unlock_iothread();
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address_space_stl(&env->address_space_iocsr, 0x1008,
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data, MEMTXATTRS_UNSPECIFIED, NULL);
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@ -86,23 +96,23 @@ static void ipi_send(uint64_t val)
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static void mail_send(uint64_t val)
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{
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int cpuid, data;
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int cpuid;
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hwaddr addr;
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CPULoongArchState *env;
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CPUState *cs;
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LoongArchCPU *cpu;
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cpuid = (val >> 16) & 0x3ff;
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addr = 0x1020 + (val & 0x1c);
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CPUState *cs = qemu_get_cpu(cpuid);
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LoongArchCPU *cpu = LOONGARCH_CPU(cs);
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cs = qemu_get_cpu(cpuid);
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cpu = LOONGARCH_CPU(cs);
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env = &cpu->env;
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data = get_ipi_data(val);
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address_space_stl(&env->address_space_iocsr, addr,
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data, MEMTXATTRS_UNSPECIFIED, NULL);
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send_ipi_data(env, val, addr);
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}
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static void any_send(uint64_t val)
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{
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int cpuid, data;
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int cpuid;
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hwaddr addr;
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CPULoongArchState *env;
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@ -111,9 +121,7 @@ static void any_send(uint64_t val)
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CPUState *cs = qemu_get_cpu(cpuid);
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LoongArchCPU *cpu = LOONGARCH_CPU(cs);
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env = &cpu->env;
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data = get_ipi_data(val);
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address_space_stl(&env->address_space_iocsr, addr,
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data, MEMTXATTRS_UNSPECIFIED, NULL);
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send_ipi_data(env, val, addr);
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}
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static void loongarch_ipi_writel(void *opaque, hwaddr addr, uint64_t val,
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