mirror of
https://gitlab.com/qemu-project/qemu
synced 2024-11-05 20:35:44 +00:00
Remove ARM NVIC initialization hack
The ARMv7-M NVIC device pokes itself into the CPU state. Now we have a proper device model we can have the CPU/SoC code do this. Signed-off-by: Paul Brook <paul@codesourcery.com>
This commit is contained in:
parent
f3d08ee6ae
commit
bdb11366b9
2 changed files with 1 additions and 6 deletions
|
@ -198,7 +198,7 @@ qemu_irq *armv7m_init(int flash_size, int sram_size,
|
|||
armv7m_bitband_init();
|
||||
|
||||
nvic = qdev_create(NULL, "armv7m_nvic");
|
||||
qdev_set_prop_ptr(nvic, "cpu", env);
|
||||
env->v7m.nvic = nvic;
|
||||
qdev_init(nvic);
|
||||
cpu_pic = arm_pic_init_cpu(env);
|
||||
sysbus_connect_irq(sysbus_from_qdev(nvic), 0, cpu_pic[ARM_PIC_CPU_IRQ]);
|
||||
|
|
|
@ -393,15 +393,10 @@ static int nvic_load(QEMUFile *f, void *opaque, int version_id)
|
|||
static void armv7m_nvic_init(SysBusDevice *dev)
|
||||
{
|
||||
nvic_state *s= FROM_SYSBUSGIC(nvic_state, dev);
|
||||
CPUState *env;
|
||||
|
||||
env = qdev_get_prop_ptr(&dev->qdev, "cpu");
|
||||
gic_init(&s->gic);
|
||||
cpu_register_physical_memory(0xe000e000, 0x1000, s->gic.iomemtype);
|
||||
s->systick.timer = qemu_new_timer(vm_clock, systick_timer_tick, s);
|
||||
if (env->v7m.nvic)
|
||||
hw_error("CPU can only have one NVIC\n");
|
||||
env->v7m.nvic = s;
|
||||
register_savevm("armv7m_nvic", -1, 1, nvic_save, nvic_load, s);
|
||||
}
|
||||
|
||||
|
|
Loading…
Reference in a new issue