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https://gitlab.com/qemu-project/qemu
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target-arm: Add ARM UDIV/SDIV support
Add support for UDIV and SDIV in ARM mode. This is a new optional feature for A profile cores (Thumb mode has had UDIV and SDIV for M profile cores for some time). Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -375,6 +375,7 @@ enum arm_features {
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ARM_FEATURE_V5,
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ARM_FEATURE_V5,
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ARM_FEATURE_STRONGARM,
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ARM_FEATURE_STRONGARM,
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ARM_FEATURE_VAPA, /* cp15 VA to PA lookups */
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ARM_FEATURE_VAPA, /* cp15 VA to PA lookups */
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ARM_FEATURE_ARM_DIV, /* divide supported in ARM encoding */
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};
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};
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static inline int arm_feature(CPUARMState *env, int feature)
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static inline int arm_feature(CPUARMState *env, int feature)
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@ -207,7 +207,7 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
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set_feature(env, ARM_FEATURE_VFP_FP16);
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set_feature(env, ARM_FEATURE_VFP_FP16);
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set_feature(env, ARM_FEATURE_NEON);
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set_feature(env, ARM_FEATURE_NEON);
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set_feature(env, ARM_FEATURE_THUMB2EE);
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set_feature(env, ARM_FEATURE_THUMB2EE);
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set_feature(env, ARM_FEATURE_THUMB_DIV);
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set_feature(env, ARM_FEATURE_ARM_DIV);
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set_feature(env, ARM_FEATURE_V7MP);
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set_feature(env, ARM_FEATURE_V7MP);
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break;
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break;
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case ARM_CPUID_TI915T:
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case ARM_CPUID_TI915T:
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@ -261,6 +261,9 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
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if (arm_feature(env, ARM_FEATURE_V7)) {
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if (arm_feature(env, ARM_FEATURE_V7)) {
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set_feature(env, ARM_FEATURE_VAPA);
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set_feature(env, ARM_FEATURE_VAPA);
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}
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}
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if (arm_feature(env, ARM_FEATURE_ARM_DIV)) {
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set_feature(env, ARM_FEATURE_THUMB_DIV);
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}
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}
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}
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void cpu_reset(CPUARMState *env)
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void cpu_reset(CPUARMState *env)
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@ -7639,6 +7639,25 @@ static void disas_arm_insn(CPUState * env, DisasContext *s)
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store_reg(s, rn, tmp);
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store_reg(s, rn, tmp);
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}
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}
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break;
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break;
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case 1:
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case 3:
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/* SDIV, UDIV */
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if (!arm_feature(env, ARM_FEATURE_ARM_DIV)) {
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goto illegal_op;
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}
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if (((insn >> 5) & 7) || (rd != 15)) {
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goto illegal_op;
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}
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tmp = load_reg(s, rm);
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tmp2 = load_reg(s, rs);
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if (insn & (1 << 21)) {
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gen_helper_udiv(tmp, tmp, tmp2);
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} else {
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gen_helper_sdiv(tmp, tmp, tmp2);
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}
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tcg_temp_free_i32(tmp2);
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store_reg(s, rn, tmp);
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break;
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default:
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default:
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goto illegal_op;
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goto illegal_op;
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}
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}
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