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vfio/pci: Make capability related functions return bool
The functions operating on capability don't have a consistent return style. Below functions are in bool-valued functions style: vfio_msi_setup() vfio_msix_setup() vfio_add_std_cap() vfio_add_capabilities() Below two are integer-valued functions: vfio_add_vendor_specific_cap() vfio_setup_pcie_cap() But the returned integer is only used for check succeed/failure. Change them all to return bool so now all capability related functions follow the coding standand in qapi/error.h to return bool. Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Signed-off-by: Cédric Le Goater <clg@redhat.com>
This commit is contained in:
Zhenzhong Duan
Cédric Le Goater
parent
64410a741d
commit
b771a40f9e
1 changed files with 36 additions and 41 deletions
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@ -1339,7 +1339,7 @@ static void vfio_disable_interrupts(VFIOPCIDevice *vdev)
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}
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}
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static int vfio_msi_setup(VFIOPCIDevice *vdev, int pos, Error **errp)
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static bool vfio_msi_setup(VFIOPCIDevice *vdev, int pos, Error **errp)
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{
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uint16_t ctrl;
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bool msi_64bit, msi_maskbit;
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@ -1349,7 +1349,7 @@ static int vfio_msi_setup(VFIOPCIDevice *vdev, int pos, Error **errp)
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if (pread(vdev->vbasedev.fd, &ctrl, sizeof(ctrl),
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vdev->config_offset + pos + PCI_CAP_FLAGS) != sizeof(ctrl)) {
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error_setg_errno(errp, errno, "failed reading MSI PCI_CAP_FLAGS");
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return -errno;
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return false;
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}
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ctrl = le16_to_cpu(ctrl);
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@ -1362,14 +1362,14 @@ static int vfio_msi_setup(VFIOPCIDevice *vdev, int pos, Error **errp)
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ret = msi_init(&vdev->pdev, pos, entries, msi_64bit, msi_maskbit, &err);
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if (ret < 0) {
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if (ret == -ENOTSUP) {
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return 0;
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return true;
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}
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error_propagate_prepend(errp, err, "msi_init failed: ");
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return ret;
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return false;
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}
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vdev->msi_cap_size = 0xa + (msi_maskbit ? 0xa : 0) + (msi_64bit ? 0x4 : 0);
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return 0;
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return true;
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}
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static void vfio_pci_fixup_msix_region(VFIOPCIDevice *vdev)
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@ -1644,7 +1644,7 @@ static bool vfio_msix_early_setup(VFIOPCIDevice *vdev, Error **errp)
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return vfio_pci_relocate_msix(vdev, errp);
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}
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static int vfio_msix_setup(VFIOPCIDevice *vdev, int pos, Error **errp)
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static bool vfio_msix_setup(VFIOPCIDevice *vdev, int pos, Error **errp)
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{
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int ret;
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Error *err = NULL;
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@ -1660,11 +1660,11 @@ static int vfio_msix_setup(VFIOPCIDevice *vdev, int pos, Error **errp)
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if (ret < 0) {
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if (ret == -ENOTSUP) {
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warn_report_err(err);
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return 0;
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return true;
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}
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error_propagate(errp, err);
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return ret;
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return false;
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}
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/*
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@ -1698,7 +1698,7 @@ static int vfio_msix_setup(VFIOPCIDevice *vdev, int pos, Error **errp)
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memory_region_set_enabled(&vdev->pdev.msix_table_mmio, false);
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}
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return 0;
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return true;
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}
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static void vfio_teardown_msi(VFIOPCIDevice *vdev)
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@ -1977,8 +1977,8 @@ static void vfio_pci_disable_rp_atomics(VFIOPCIDevice *vdev)
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}
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}
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static int vfio_setup_pcie_cap(VFIOPCIDevice *vdev, int pos, uint8_t size,
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Error **errp)
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static bool vfio_setup_pcie_cap(VFIOPCIDevice *vdev, int pos, uint8_t size,
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Error **errp)
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{
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uint16_t flags;
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uint8_t type;
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@ -1992,7 +1992,7 @@ static int vfio_setup_pcie_cap(VFIOPCIDevice *vdev, int pos, uint8_t size,
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error_setg(errp, "assignment of PCIe type 0x%x "
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"devices is not currently supported", type);
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return -EINVAL;
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return false;
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}
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if (!pci_bus_is_express(pci_get_bus(&vdev->pdev))) {
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@ -2025,7 +2025,7 @@ static int vfio_setup_pcie_cap(VFIOPCIDevice *vdev, int pos, uint8_t size,
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}
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if (pci_bus_is_express(bus)) {
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return 0;
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return true;
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}
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} else if (pci_bus_is_root(pci_get_bus(&vdev->pdev))) {
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@ -2063,7 +2063,7 @@ static int vfio_setup_pcie_cap(VFIOPCIDevice *vdev, int pos, uint8_t size,
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* Legacy endpoints don't belong on the root complex. Windows
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* seems to be happier with devices if we skip the capability.
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*/
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return 0;
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return true;
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}
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} else {
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@ -2099,12 +2099,12 @@ static int vfio_setup_pcie_cap(VFIOPCIDevice *vdev, int pos, uint8_t size,
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pos = pci_add_capability(&vdev->pdev, PCI_CAP_ID_EXP, pos, size,
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errp);
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if (pos < 0) {
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return pos;
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return false;
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}
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vdev->pdev.exp.exp_cap = pos;
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return pos;
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return true;
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}
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static void vfio_check_pcie_flr(VFIOPCIDevice *vdev, uint8_t pos)
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@ -2137,14 +2137,14 @@ static void vfio_check_af_flr(VFIOPCIDevice *vdev, uint8_t pos)
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}
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}
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static int vfio_add_vendor_specific_cap(VFIOPCIDevice *vdev, int pos,
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uint8_t size, Error **errp)
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static bool vfio_add_vendor_specific_cap(VFIOPCIDevice *vdev, int pos,
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uint8_t size, Error **errp)
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{
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PCIDevice *pdev = &vdev->pdev;
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pos = pci_add_capability(pdev, PCI_CAP_ID_VNDR, pos, size, errp);
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if (pos < 0) {
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return pos;
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return false;
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}
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/*
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@ -2156,15 +2156,15 @@ static int vfio_add_vendor_specific_cap(VFIOPCIDevice *vdev, int pos,
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memset(pdev->cmask + pos + 3, 0, size - 3);
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}
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return pos;
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return true;
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}
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static int vfio_add_std_cap(VFIOPCIDevice *vdev, uint8_t pos, Error **errp)
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static bool vfio_add_std_cap(VFIOPCIDevice *vdev, uint8_t pos, Error **errp)
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{
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ERRP_GUARD();
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PCIDevice *pdev = &vdev->pdev;
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uint8_t cap_id, next, size;
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int ret;
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bool ret;
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cap_id = pdev->config[pos];
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next = pdev->config[pos + PCI_CAP_LIST_NEXT];
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@ -2185,9 +2185,8 @@ static int vfio_add_std_cap(VFIOPCIDevice *vdev, uint8_t pos, Error **errp)
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* will be changed as we unwind the stack.
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*/
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if (next) {
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ret = vfio_add_std_cap(vdev, next, errp);
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if (ret) {
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return ret;
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if (!vfio_add_std_cap(vdev, next, errp)) {
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return false;
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}
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} else {
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/* Begin the rebuild, use QEMU emulated list bits */
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@ -2197,7 +2196,7 @@ static int vfio_add_std_cap(VFIOPCIDevice *vdev, uint8_t pos, Error **errp)
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ret = vfio_add_virt_caps(vdev, errp);
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if (ret) {
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return ret;
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return false;
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}
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}
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@ -2221,28 +2220,27 @@ static int vfio_add_std_cap(VFIOPCIDevice *vdev, uint8_t pos, Error **errp)
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case PCI_CAP_ID_PM:
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vfio_check_pm_reset(vdev, pos);
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vdev->pm_cap = pos;
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ret = pci_add_capability(pdev, cap_id, pos, size, errp);
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ret = pci_add_capability(pdev, cap_id, pos, size, errp) >= 0;
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break;
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case PCI_CAP_ID_AF:
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vfio_check_af_flr(vdev, pos);
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ret = pci_add_capability(pdev, cap_id, pos, size, errp);
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ret = pci_add_capability(pdev, cap_id, pos, size, errp) >= 0;
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break;
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case PCI_CAP_ID_VNDR:
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ret = vfio_add_vendor_specific_cap(vdev, pos, size, errp);
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break;
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default:
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ret = pci_add_capability(pdev, cap_id, pos, size, errp);
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ret = pci_add_capability(pdev, cap_id, pos, size, errp) >= 0;
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break;
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}
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if (ret < 0) {
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if (!ret) {
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error_prepend(errp,
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"failed to add PCI capability 0x%x[0x%x]@0x%x: ",
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cap_id, size, pos);
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return ret;
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}
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return 0;
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return ret;
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}
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static int vfio_setup_rebar_ecap(VFIOPCIDevice *vdev, uint16_t pos)
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@ -2388,23 +2386,21 @@ static void vfio_add_ext_cap(VFIOPCIDevice *vdev)
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return;
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}
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static int vfio_add_capabilities(VFIOPCIDevice *vdev, Error **errp)
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static bool vfio_add_capabilities(VFIOPCIDevice *vdev, Error **errp)
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{
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PCIDevice *pdev = &vdev->pdev;
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int ret;
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if (!(pdev->config[PCI_STATUS] & PCI_STATUS_CAP_LIST) ||
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!pdev->config[PCI_CAPABILITY_LIST]) {
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return 0; /* Nothing to add */
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return true; /* Nothing to add */
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}
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ret = vfio_add_std_cap(vdev, pdev->config[PCI_CAPABILITY_LIST], errp);
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if (ret) {
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return ret;
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if (!vfio_add_std_cap(vdev, pdev->config[PCI_CAPABILITY_LIST], errp)) {
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return false;
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}
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vfio_add_ext_cap(vdev);
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return 0;
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return true;
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}
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void vfio_pci_pre_reset(VFIOPCIDevice *vdev)
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@ -3133,8 +3129,7 @@ static void vfio_realize(PCIDevice *pdev, Error **errp)
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vfio_bars_register(vdev);
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ret = vfio_add_capabilities(vdev, errp);
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if (ret) {
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if (!vfio_add_capabilities(vdev, errp)) {
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goto out_teardown;
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}
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