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target/ppc: Add TFMR SPR implementation with read and write helpers

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TFMR is the Time Facility Management Register which is specific to
POWER CPUs, and used for the purpose of timebase management (generally
by firmware, not the OS).

Add helpers for the TFMR register, which will form part of the core
timebase facility model in future but for now behaviour is unchanged.

Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Message-ID: <20230625120317.13877-3-npiggin@gmail.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
This commit is contained in:
Nicholas Piggin 2023-06-25 22:03:17 +10:00 committed by Daniel Henrique Barboza
parent 6f967f4f78
commit b25f2ffa19
5 changed files with 28 additions and 1 deletions
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2
target/ppc/cpu_init.c
View file

@ -5658,7 +5658,7 @@ static void register_power_common_book4_sprs(CPUPPCState *env)
spr_register_hv(env, SPR_TFMR, "TFMR",
SPR_NOACCESS, SPR_NOACCESS,
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
&spr_read_tfmr, &spr_write_tfmr,
0x00000000);
#endif
}

2
target/ppc/helper.h
View file

@ -722,6 +722,8 @@ DEF_HELPER_FLAGS_1(load_dpdes, TCG_CALL_NO_RWG, tl, env)
DEF_HELPER_FLAGS_2(store_dpdes, TCG_CALL_NO_RWG, void, env, tl)
DEF_HELPER_2(book3s_msgsndp, void, env, tl)
DEF_HELPER_2(book3s_msgclrp, void, env, tl)
DEF_HELPER_1(load_tfmr, tl, env)
DEF_HELPER_2(store_tfmr, void, env, tl)
#endif
DEF_HELPER_2(store_sdr1, void, env, tl)
DEF_HELPER_2(store_pidr, void, env, tl)

2
target/ppc/spr_common.h
View file

@ -194,6 +194,8 @@ void spr_write_ebb(DisasContext *ctx, int sprn, int gprn);
void spr_read_ebb_upper32(DisasContext *ctx, int gprn, int sprn);
void spr_write_ebb_upper32(DisasContext *ctx, int sprn, int gprn);
void spr_write_hmer(DisasContext *ctx, int sprn, int gprn);
void spr_read_tfmr(DisasContext *ctx, int gprn, int sprn);
void spr_write_tfmr(DisasContext *ctx, int sprn, int gprn);
void spr_write_lpcr(DisasContext *ctx, int sprn, int gprn);
void spr_read_dexcr_ureg(DisasContext *ctx, int gprn, int sprn);
#endif

13
target/ppc/timebase_helper.c
View file

@ -144,6 +144,19 @@ void helper_store_booke_tsr(CPUPPCState *env, target_ulong val)
store_booke_tsr(env, val);
}
#if defined(TARGET_PPC64)
/* POWER processor Timebase Facility */
target_ulong helper_load_tfmr(CPUPPCState *env)
{
return env->spr[SPR_TFMR];
}
void helper_store_tfmr(CPUPPCState *env, target_ulong val)
{
env->spr[SPR_TFMR] = val;
}
#endif
/*****************************************************************************/
/* Embedded PowerPC specific helpers */

10
target/ppc/translate.c
View file

@ -1175,6 +1175,16 @@ void spr_write_hmer(DisasContext *ctx, int sprn, int gprn)
spr_store_dump_spr(sprn);
}
void spr_read_tfmr(DisasContext *ctx, int gprn, int sprn)
{
gen_helper_load_tfmr(cpu_gpr[gprn], cpu_env);
}
void spr_write_tfmr(DisasContext *ctx, int sprn, int gprn)
{
gen_helper_store_tfmr(cpu_env, cpu_gpr[gprn]);
}
void spr_write_lpcr(DisasContext *ctx, int sprn, int gprn)
{
gen_helper_store_lpcr(cpu_env, cpu_gpr[gprn]);