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tcg-mips: Define TCG_TARGET_INSN_UNIT_SIZE
And use tcg pointer differencing functions as appropriate. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
This commit is contained in:
Richard Henderson
parent
5588ff2921
commit
ae0218e350
2 changed files with 37 additions and 80 deletions
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@ -108,83 +108,38 @@ static const TCGReg tcg_target_call_oarg_regs[2] = {
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TCG_REG_V1
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};
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static uint8_t *tb_ret_addr;
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static tcg_insn_unit *tb_ret_addr;
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static inline uint32_t reloc_lo16_val(void *pc, intptr_t target)
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static inline uint32_t reloc_pc16_val(tcg_insn_unit *pc, tcg_insn_unit *target)
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{
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return target & 0xffff;
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/* Let the compiler perform the right-shift as part of the arithmetic. */
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ptrdiff_t disp = target - (pc + 1);
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assert(disp == (int16_t)disp);
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return disp & 0xffff;
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}
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static inline void reloc_lo16(void *pc, intptr_t target)
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static inline void reloc_pc16(tcg_insn_unit *pc, tcg_insn_unit *target)
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{
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*(uint32_t *) pc = (*(uint32_t *) pc & ~0xffff)
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| reloc_lo16_val(pc, target);
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*pc = deposit32(*pc, 0, 16, reloc_pc16_val(pc, target));
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}
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static inline uint32_t reloc_hi16_val(void *pc, intptr_t target)
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static inline uint32_t reloc_26_val(tcg_insn_unit *pc, tcg_insn_unit *target)
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{
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return (target >> 16) & 0xffff;
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assert((((uintptr_t)pc ^ (uintptr_t)target) & 0xf0000000) == 0);
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return ((uintptr_t)target >> 2) & 0x3ffffff;
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}
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static inline void reloc_hi16(void *pc, intptr_t target)
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static inline void reloc_26(tcg_insn_unit *pc, tcg_insn_unit *target)
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{
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*(uint32_t *) pc = (*(uint32_t *) pc & ~0xffff)
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| reloc_hi16_val(pc, target);
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*pc = deposit32(*pc, 0, 26, reloc_26_val(pc, target));
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}
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static inline uint32_t reloc_pc16_val(void *pc, intptr_t target)
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{
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int32_t disp;
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disp = target - (intptr_t)pc - 4;
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if (disp != (disp << 14) >> 14) {
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tcg_abort ();
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}
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return (disp >> 2) & 0xffff;
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}
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static inline void reloc_pc16 (void *pc, tcg_target_long target)
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{
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*(uint32_t *) pc = (*(uint32_t *) pc & ~0xffff)
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| reloc_pc16_val(pc, target);
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}
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static inline uint32_t reloc_26_val (void *pc, tcg_target_long target)
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{
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if ((((tcg_target_long)pc + 4) & 0xf0000000) != (target & 0xf0000000)) {
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tcg_abort ();
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}
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return (target >> 2) & 0x3ffffff;
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}
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static inline void reloc_pc26(void *pc, intptr_t target)
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{
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*(uint32_t *) pc = (*(uint32_t *) pc & ~0x3ffffff)
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| reloc_26_val(pc, target);
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}
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static void patch_reloc(uint8_t *code_ptr, int type,
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static void patch_reloc(tcg_insn_unit *code_ptr, int type,
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intptr_t value, intptr_t addend)
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{
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value += addend;
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switch(type) {
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case R_MIPS_LO16:
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reloc_lo16(code_ptr, value);
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break;
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case R_MIPS_HI16:
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reloc_hi16(code_ptr, value);
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break;
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case R_MIPS_PC16:
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reloc_pc16(code_ptr, value);
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break;
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case R_MIPS_26:
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reloc_pc26(code_ptr, value);
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break;
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default:
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tcg_abort();
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}
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assert(type == R_MIPS_PC16);
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assert(addend == 0);
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reloc_pc16(code_ptr, (tcg_insn_unit *)value);
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}
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/* parse target specific constraints */
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@ -374,7 +329,7 @@ static inline void tcg_out_opc_br(TCGContext *s, int opc,
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/* We pay attention here to not modify the branch target by reading
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the existing value and using it again. This ensure that caches and
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memory are kept coherent during retranslation. */
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uint16_t offset = (uint16_t)(*(uint32_t *) s->code_ptr);
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uint16_t offset = (uint16_t)*s->code_ptr;
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tcg_out_opc_imm(s, opc, rt, rs, offset);
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}
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@ -663,9 +618,9 @@ static void tcg_out_brcond(TCGContext *s, TCGCond cond, TCGArg arg1,
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break;
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}
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if (l->has_value) {
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reloc_pc16(s->code_ptr - 4, l->u.value);
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reloc_pc16(s->code_ptr - 1, l->u.value_ptr);
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} else {
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tcg_out_reloc(s, s->code_ptr - 4, R_MIPS_PC16, label_index, 0);
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tcg_out_reloc(s, s->code_ptr - 1, R_MIPS_PC16, label_index, 0);
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}
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tcg_out_nop(s);
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}
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@ -676,7 +631,7 @@ static void tcg_out_brcond2(TCGContext *s, TCGCond cond, TCGArg arg1,
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TCGArg arg2, TCGArg arg3, TCGArg arg4,
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int label_index)
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{
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void *label_ptr;
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tcg_insn_unit *label_ptr;
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switch(cond) {
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case TCG_COND_NE:
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@ -733,7 +688,7 @@ static void tcg_out_brcond2(TCGContext *s, TCGCond cond, TCGArg arg1,
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tcg_abort();
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}
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reloc_pc16(label_ptr, (tcg_target_long) s->code_ptr);
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reloc_pc16(label_ptr, s->code_ptr);
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}
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static void tcg_out_movcond(TCGContext *s, TCGCond cond, TCGReg ret,
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@ -945,12 +900,12 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
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{
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TCGReg addr_regl, data_regl, data_regh, data_reg1, data_reg2;
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#if defined(CONFIG_SOFTMMU)
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void *label1_ptr, *label2_ptr;
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tcg_insn_unit *label1_ptr, *label2_ptr;
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int arg_num;
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int mem_index, s_bits;
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int addr_meml;
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# if TARGET_LONG_BITS == 64
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uint8_t *label3_ptr;
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tcg_insn_unit *label3_ptr;
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TCGReg addr_regh;
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int addr_memh;
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# endif
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@ -1011,7 +966,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
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tcg_out_opc_br(s, OPC_BEQ, addr_regh, TCG_REG_AT);
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tcg_out_nop(s);
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reloc_pc16(label3_ptr, (tcg_target_long) s->code_ptr);
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reloc_pc16(label3_ptr, s->code_ptr);
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# else
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label1_ptr = s->code_ptr;
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tcg_out_opc_br(s, OPC_BEQ, TCG_REG_T0, TCG_REG_AT);
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@ -1060,7 +1015,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
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tcg_out_nop(s);
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/* label1: fast path */
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reloc_pc16(label1_ptr, (tcg_target_long) s->code_ptr);
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reloc_pc16(label1_ptr, s->code_ptr);
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tcg_out_opc_imm(s, OPC_LW, TCG_REG_A0, TCG_REG_A0,
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offsetof(CPUArchState, tlb_table[mem_index][0].addend));
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@ -1121,7 +1076,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
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}
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#if defined(CONFIG_SOFTMMU)
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reloc_pc16(label2_ptr, (tcg_target_long) s->code_ptr);
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reloc_pc16(label2_ptr, s->code_ptr);
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#endif
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}
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@ -1130,14 +1085,14 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
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{
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TCGReg addr_regl, data_regl, data_regh, data_reg1, data_reg2;
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#if defined(CONFIG_SOFTMMU)
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uint8_t *label1_ptr, *label2_ptr;
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tcg_insn_unit *label1_ptr, *label2_ptr;
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int arg_num;
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int mem_index, s_bits;
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int addr_meml;
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#endif
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#if TARGET_LONG_BITS == 64
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# if defined(CONFIG_SOFTMMU)
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uint8_t *label3_ptr;
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tcg_insn_unit *label3_ptr;
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TCGReg addr_regh;
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int addr_memh;
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# endif
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@ -1200,7 +1155,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
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tcg_out_opc_br(s, OPC_BEQ, addr_regh, TCG_REG_AT);
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tcg_out_nop(s);
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reloc_pc16(label3_ptr, (tcg_target_long) s->code_ptr);
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reloc_pc16(label3_ptr, s->code_ptr);
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# else
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label1_ptr = s->code_ptr;
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tcg_out_opc_br(s, OPC_BEQ, TCG_REG_T0, TCG_REG_AT);
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@ -1241,7 +1196,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
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tcg_out_nop(s);
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/* label1: fast path */
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reloc_pc16(label1_ptr, (tcg_target_long) s->code_ptr);
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reloc_pc16(label1_ptr, s->code_ptr);
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tcg_out_opc_imm(s, OPC_LW, TCG_REG_A0, TCG_REG_A0,
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offsetof(CPUArchState, tlb_table[mem_index][0].addend));
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@ -1293,7 +1248,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
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}
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#if defined(CONFIG_SOFTMMU)
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reloc_pc16(label2_ptr, (tcg_target_long) s->code_ptr);
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reloc_pc16(label2_ptr, s->code_ptr);
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#endif
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}
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@ -1303,7 +1258,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
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switch(opc) {
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case INDEX_op_exit_tb:
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tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_V0, args[0]);
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tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_AT, (tcg_target_long)tb_ret_addr);
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tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_AT, (uintptr_t)tb_ret_addr);
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tcg_out_opc_reg(s, OPC_JR, 0, TCG_REG_AT, 0);
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tcg_out_nop(s);
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break;
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@ -1313,12 +1268,13 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
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tcg_abort();
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} else {
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/* indirect jump method */
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tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_AT, (tcg_target_long)(s->tb_next + args[0]));
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tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_AT,
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(uintptr_t)(s->tb_next + args[0]));
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tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_AT, TCG_REG_AT, 0);
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tcg_out_opc_reg(s, OPC_JR, 0, TCG_REG_AT, 0);
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}
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tcg_out_nop(s);
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s->tb_next_offset[args[0]] = s->code_ptr - s->code_buf;
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s->tb_next_offset[args[0]] = tcg_current_code_size(s);
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break;
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case INDEX_op_call:
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tcg_out_opc_reg(s, OPC_JALR, TCG_REG_RA, args[0], 0);
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@ -26,6 +26,7 @@
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#ifndef TCG_TARGET_MIPS
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#define TCG_TARGET_MIPS 1
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#define TCG_TARGET_INSN_UNIT_SIZE 4
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#define TCG_TARGET_NB_REGS 32
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typedef enum {
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