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target/avr: Drop avr_cpu_memory_rw_debug()
CPUClass::memory_rw_debug() holds a callback for GDB memory access. If not provided, cpu_memory_rw_debug() is used by the GDB stub. Drop avr_cpu_memory_rw_debug() which does nothing special. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220322095004.70682-1-bmeng.cn@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -214,7 +214,6 @@ static void avr_cpu_class_init(ObjectClass *oc, void *data)
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cc->has_work = avr_cpu_has_work;
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cc->has_work = avr_cpu_has_work;
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cc->dump_state = avr_cpu_dump_state;
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cc->dump_state = avr_cpu_dump_state;
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cc->set_pc = avr_cpu_set_pc;
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cc->set_pc = avr_cpu_set_pc;
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cc->memory_rw_debug = avr_cpu_memory_rw_debug;
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dc->vmsd = &vms_avr_cpu;
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dc->vmsd = &vms_avr_cpu;
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cc->sysemu_ops = &avr_sysemu_ops;
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cc->sysemu_ops = &avr_sysemu_ops;
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cc->disas_set_info = avr_cpu_disas_set_info;
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cc->disas_set_info = avr_cpu_disas_set_info;
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@ -184,8 +184,6 @@ void avr_cpu_tcg_init(void);
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void avr_cpu_list(void);
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void avr_cpu_list(void);
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int cpu_avr_exec(CPUState *cpu);
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int cpu_avr_exec(CPUState *cpu);
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int avr_cpu_memory_rw_debug(CPUState *cs, vaddr address, uint8_t *buf,
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int len, bool is_write);
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enum {
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enum {
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TB_FLAGS_FULL_ACCESS = 1,
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TB_FLAGS_FULL_ACCESS = 1,
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@ -93,12 +93,6 @@ void avr_cpu_do_interrupt(CPUState *cs)
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cs->exception_index = -1;
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cs->exception_index = -1;
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}
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}
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int avr_cpu_memory_rw_debug(CPUState *cs, vaddr addr, uint8_t *buf,
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int len, bool is_write)
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{
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return cpu_memory_rw_debug(cs, addr, buf, len, is_write);
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}
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hwaddr avr_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
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hwaddr avr_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
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{
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{
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return addr; /* I assume 1:1 address correspondence */
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return addr; /* I assume 1:1 address correspondence */
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