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target/arm: Enable TARGET_PAGE_BITS_VARY for AArch64 user-only
Since aarch64 binaries are generally built for multiple page sizes, it is trivial to allow the page size to vary. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Acked-by: Helge Deller <deller@gmx.de> Message-Id: <20240102015808.132373-31-richard.henderson@linaro.org>
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@ -19,9 +19,13 @@
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#endif
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#endif
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#ifdef CONFIG_USER_ONLY
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#ifdef CONFIG_USER_ONLY
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#define TARGET_PAGE_BITS 12
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# ifdef TARGET_AARCH64
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# ifdef TARGET_AARCH64
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# define TARGET_TAGGED_ADDRESSES
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# define TARGET_TAGGED_ADDRESSES
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/* Allow user-only to vary page size from 4k */
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# define TARGET_PAGE_BITS_VARY
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# define TARGET_PAGE_BITS_MIN 12
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# else
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# define TARGET_PAGE_BITS 12
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# endif
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# endif
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#else
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#else
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/*
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/*
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@ -1809,7 +1809,6 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp)
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ARMCPU *cpu = ARM_CPU(dev);
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ARMCPU *cpu = ARM_CPU(dev);
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ARMCPUClass *acc = ARM_CPU_GET_CLASS(dev);
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ARMCPUClass *acc = ARM_CPU_GET_CLASS(dev);
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CPUARMState *env = &cpu->env;
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CPUARMState *env = &cpu->env;
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int pagebits;
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Error *local_err = NULL;
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Error *local_err = NULL;
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#if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY)
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#if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY)
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@ -2100,28 +2099,36 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp)
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!cpu_isar_feature(aa32_vfp_simd, cpu) ||
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!cpu_isar_feature(aa32_vfp_simd, cpu) ||
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!arm_feature(env, ARM_FEATURE_XSCALE));
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!arm_feature(env, ARM_FEATURE_XSCALE));
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if (arm_feature(env, ARM_FEATURE_V7) &&
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#ifndef CONFIG_USER_ONLY
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!arm_feature(env, ARM_FEATURE_M) &&
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{
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!arm_feature(env, ARM_FEATURE_PMSA)) {
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int pagebits;
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/* v7VMSA drops support for the old ARMv5 tiny pages, so we
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if (arm_feature(env, ARM_FEATURE_V7) &&
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* can use 4K pages.
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!arm_feature(env, ARM_FEATURE_M) &&
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*/
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!arm_feature(env, ARM_FEATURE_PMSA)) {
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pagebits = 12;
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/*
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} else {
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* v7VMSA drops support for the old ARMv5 tiny pages,
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/* For CPUs which might have tiny 1K pages, or which have an
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* so we can use 4K pages.
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* MPU and might have small region sizes, stick with 1K pages.
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*/
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*/
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pagebits = 12;
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pagebits = 10;
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} else {
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}
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/*
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if (!set_preferred_target_page_bits(pagebits)) {
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* For CPUs which might have tiny 1K pages, or which have an
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/* This can only ever happen for hotplugging a CPU, or if
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* MPU and might have small region sizes, stick with 1K pages.
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* the board code incorrectly creates a CPU which it has
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*/
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* promised via minimum_page_size that it will not.
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pagebits = 10;
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*/
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}
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error_setg(errp, "This CPU requires a smaller page size than the "
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if (!set_preferred_target_page_bits(pagebits)) {
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"system is using");
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/*
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return;
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* This can only ever happen for hotplugging a CPU, or if
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* the board code incorrectly creates a CPU which it has
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* promised via minimum_page_size that it will not.
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*/
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error_setg(errp, "This CPU requires a smaller page size "
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"than the system is using");
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return;
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}
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}
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}
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#endif
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/* This cpu-id-to-MPIDR affinity is used only for TCG; KVM will override it.
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/* This cpu-id-to-MPIDR affinity is used only for TCG; KVM will override it.
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* We don't support setting cluster ID ([16..23]) (known as Aff2
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* We don't support setting cluster ID ([16..23]) (known as Aff2
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