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exec.c: Pass MemTxAttrs to iotlb_to_region so it uses the right AS
Pass the MemTxAttrs for the memory access to iotlb_to_region(); this allows it to determine the correct AddressSpace to use for the lookup. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
This commit is contained in:
parent
d7898cda81
commit
a54c87b68a
6
cputlb.c
6
cputlb.c
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@ -449,6 +449,7 @@ tb_page_addr_t get_page_addr_code(CPUArchState *env1, target_ulong addr)
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void *p;
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void *p;
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MemoryRegion *mr;
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MemoryRegion *mr;
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CPUState *cpu = ENV_GET_CPU(env1);
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CPUState *cpu = ENV_GET_CPU(env1);
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CPUIOTLBEntry *iotlbentry;
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page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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mmu_idx = cpu_mmu_index(env1, true);
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mmu_idx = cpu_mmu_index(env1, true);
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@ -456,8 +457,9 @@ tb_page_addr_t get_page_addr_code(CPUArchState *env1, target_ulong addr)
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(addr & TARGET_PAGE_MASK))) {
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(addr & TARGET_PAGE_MASK))) {
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cpu_ldub_code(env1, addr);
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cpu_ldub_code(env1, addr);
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}
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}
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pd = env1->iotlb[mmu_idx][page_index].addr & ~TARGET_PAGE_MASK;
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iotlbentry = &env1->iotlb[mmu_idx][page_index];
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mr = iotlb_to_region(cpu, pd);
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pd = iotlbentry->addr & ~TARGET_PAGE_MASK;
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mr = iotlb_to_region(cpu, pd, iotlbentry->attrs);
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if (memory_region_is_unassigned(mr)) {
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if (memory_region_is_unassigned(mr)) {
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CPUClass *cc = CPU_GET_CLASS(cpu);
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CPUClass *cc = CPU_GET_CLASS(cpu);
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5
exec.c
5
exec.c
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@ -2238,9 +2238,10 @@ static uint16_t dummy_section(PhysPageMap *map, AddressSpace *as,
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return phys_section_add(map, §ion);
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return phys_section_add(map, §ion);
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}
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}
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MemoryRegion *iotlb_to_region(CPUState *cpu, hwaddr index)
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MemoryRegion *iotlb_to_region(CPUState *cpu, hwaddr index, MemTxAttrs attrs)
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{
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{
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CPUAddressSpace *cpuas = &cpu->cpu_ases[0];
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int asidx = cpu_asidx_from_attrs(cpu, attrs);
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CPUAddressSpace *cpuas = &cpu->cpu_ases[asidx];
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AddressSpaceDispatch *d = atomic_rcu_read(&cpuas->memory_dispatch);
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AddressSpaceDispatch *d = atomic_rcu_read(&cpuas->memory_dispatch);
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MemoryRegionSection *sections = d->map.sections;
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MemoryRegionSection *sections = d->map.sections;
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@ -403,7 +403,7 @@ extern uintptr_t tci_tb_ptr;
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#if !defined(CONFIG_USER_ONLY)
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#if !defined(CONFIG_USER_ONLY)
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struct MemoryRegion *iotlb_to_region(CPUState *cpu,
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struct MemoryRegion *iotlb_to_region(CPUState *cpu,
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hwaddr index);
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hwaddr index, MemTxAttrs attrs);
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void tlb_fill(CPUState *cpu, target_ulong addr, int is_write, int mmu_idx,
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void tlb_fill(CPUState *cpu, target_ulong addr, int is_write, int mmu_idx,
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uintptr_t retaddr);
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uintptr_t retaddr);
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@ -150,7 +150,7 @@ static inline DATA_TYPE glue(io_read, SUFFIX)(CPUArchState *env,
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uint64_t val;
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uint64_t val;
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CPUState *cpu = ENV_GET_CPU(env);
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CPUState *cpu = ENV_GET_CPU(env);
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hwaddr physaddr = iotlbentry->addr;
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hwaddr physaddr = iotlbentry->addr;
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MemoryRegion *mr = iotlb_to_region(cpu, physaddr);
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MemoryRegion *mr = iotlb_to_region(cpu, physaddr, iotlbentry->attrs);
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physaddr = (physaddr & TARGET_PAGE_MASK) + addr;
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physaddr = (physaddr & TARGET_PAGE_MASK) + addr;
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cpu->mem_io_pc = retaddr;
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cpu->mem_io_pc = retaddr;
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@ -357,7 +357,7 @@ static inline void glue(io_write, SUFFIX)(CPUArchState *env,
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{
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{
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CPUState *cpu = ENV_GET_CPU(env);
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CPUState *cpu = ENV_GET_CPU(env);
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hwaddr physaddr = iotlbentry->addr;
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hwaddr physaddr = iotlbentry->addr;
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MemoryRegion *mr = iotlb_to_region(cpu, physaddr);
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MemoryRegion *mr = iotlb_to_region(cpu, physaddr, iotlbentry->attrs);
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physaddr = (physaddr & TARGET_PAGE_MASK) + addr;
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physaddr = (physaddr & TARGET_PAGE_MASK) + addr;
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if (mr != &io_mem_rom && mr != &io_mem_notdirty && !cpu->can_do_io) {
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if (mr != &io_mem_rom && mr != &io_mem_notdirty && !cpu->can_do_io) {
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