mirror of
https://gitlab.com/qemu-project/qemu
synced 2024-09-06 18:05:37 +00:00
tcg-arm: Tidy variable naming convention in qemu_ld/st
s/addr_reg2/addrhi/ s/addr_reg/addrlo/ s/data_reg2/datahi/ s/data_reg/datalo/ Signed-off-by: Richard Henderson <rth@twiddle.net>
This commit is contained in:
parent
0315c51ea9
commit
a485cff09c
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@ -186,7 +186,7 @@ static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str)
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#endif
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break;
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/* qemu_st address & data_reg */
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/* qemu_st address & data */
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case 's':
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ct->ct |= TCG_CT_REG;
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tcg_regset_set32(ct->u.regs, 0, (1 << TCG_TARGET_NB_REGS) - 1);
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@ -1187,13 +1187,13 @@ static TCGReg tcg_out_tlb_read(TCGContext *s, TCGReg addrlo, TCGReg addrhi,
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int add_off = offsetof(CPUArchState, tlb_table[mem_index][0].addend);
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/* Should generate something like the following:
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* shr tmp, addr_reg, #TARGET_PAGE_BITS (1)
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* shr tmp, addrlo, #TARGET_PAGE_BITS (1)
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* add r2, env, #high
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* and r0, tmp, #(CPU_TLB_SIZE - 1) (2)
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* add r2, r2, r0, lsl #CPU_TLB_ENTRY_BITS (3)
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* ldr r0, [r2, #cmp] (4)
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* tst addr_reg, #s_mask
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* ldr r1, [r2, #add] (5)
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* tst addrlo, #s_mask
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* ldr r2, [r2, #add] (5)
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* cmpeq r0, tmp, lsl #TARGET_PAGE_BITS
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*/
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tcg_out_dat_reg(s, COND_AL, ARITH_MOV, TCG_REG_TMP,
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@ -1249,18 +1249,18 @@ static TCGReg tcg_out_tlb_read(TCGContext *s, TCGReg addrlo, TCGReg addrhi,
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path for a load or store, so that we can later generate the correct
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helper code. */
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static void add_qemu_ldst_label(TCGContext *s, int is_ld, TCGMemOp opc,
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int data_reg, int data_reg2, int addrlo_reg,
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int addrhi_reg, int mem_index,
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TCGReg datalo, TCGReg datahi, TCGReg addrlo,
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TCGReg addrhi, int mem_index,
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uint8_t *raddr, uint8_t *label_ptr)
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{
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TCGLabelQemuLdst *label = new_ldst_label(s);
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label->is_ld = is_ld;
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label->opc = opc;
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label->datalo_reg = data_reg;
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label->datahi_reg = data_reg2;
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label->addrlo_reg = addrlo_reg;
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label->addrhi_reg = addrhi_reg;
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label->datalo_reg = datalo;
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label->datahi_reg = datahi;
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label->addrlo_reg = addrlo;
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label->addrhi_reg = addrhi;
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label->mem_index = mem_index;
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label->raddr = raddr;
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label->label_ptr[0] = label_ptr;
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@ -1268,7 +1268,7 @@ static void add_qemu_ldst_label(TCGContext *s, int is_ld, TCGMemOp opc,
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static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *lb)
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{
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TCGReg argreg, data_reg, data_reg2;
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TCGReg argreg, datalo, datahi;
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TCGMemOp opc = lb->opc;
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uintptr_t func;
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@ -1296,29 +1296,29 @@ static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *lb)
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}
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tcg_out_call(s, func);
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data_reg = lb->datalo_reg;
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data_reg2 = lb->datahi_reg;
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datalo = lb->datalo_reg;
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datahi = lb->datahi_reg;
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switch (opc & MO_SSIZE) {
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case MO_SB:
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tcg_out_ext8s(s, COND_AL, data_reg, TCG_REG_R0);
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tcg_out_ext8s(s, COND_AL, datalo, TCG_REG_R0);
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break;
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case MO_SW:
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tcg_out_ext16s(s, COND_AL, data_reg, TCG_REG_R0);
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tcg_out_ext16s(s, COND_AL, datalo, TCG_REG_R0);
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break;
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default:
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tcg_out_mov_reg(s, COND_AL, data_reg, TCG_REG_R0);
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tcg_out_mov_reg(s, COND_AL, datalo, TCG_REG_R0);
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break;
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case MO_Q:
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if (data_reg != TCG_REG_R1) {
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tcg_out_mov_reg(s, COND_AL, data_reg, TCG_REG_R0);
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tcg_out_mov_reg(s, COND_AL, data_reg2, TCG_REG_R1);
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} else if (data_reg2 != TCG_REG_R0) {
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tcg_out_mov_reg(s, COND_AL, data_reg2, TCG_REG_R1);
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tcg_out_mov_reg(s, COND_AL, data_reg, TCG_REG_R0);
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if (datalo != TCG_REG_R1) {
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tcg_out_mov_reg(s, COND_AL, datalo, TCG_REG_R0);
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tcg_out_mov_reg(s, COND_AL, datahi, TCG_REG_R1);
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} else if (datahi != TCG_REG_R0) {
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tcg_out_mov_reg(s, COND_AL, datahi, TCG_REG_R1);
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tcg_out_mov_reg(s, COND_AL, datalo, TCG_REG_R0);
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} else {
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tcg_out_mov_reg(s, COND_AL, TCG_REG_TMP, TCG_REG_R0);
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tcg_out_mov_reg(s, COND_AL, data_reg2, TCG_REG_R1);
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tcg_out_mov_reg(s, COND_AL, data_reg, TCG_REG_TMP);
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tcg_out_mov_reg(s, COND_AL, datahi, TCG_REG_R1);
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tcg_out_mov_reg(s, COND_AL, datalo, TCG_REG_TMP);
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}
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break;
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}
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@ -1328,7 +1328,7 @@ static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *lb)
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static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *lb)
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{
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TCGReg argreg, data_reg, data_reg2;
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TCGReg argreg, datalo, datahi;
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TCGMemOp opc = lb->opc;
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reloc_pc24(lb->label_ptr[0], (tcg_target_long)s->code_ptr);
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@ -1341,21 +1341,21 @@ static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *lb)
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argreg = tcg_out_arg_reg32(s, argreg, lb->addrlo_reg);
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}
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data_reg = lb->datalo_reg;
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data_reg2 = lb->datahi_reg;
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datalo = lb->datalo_reg;
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datahi = lb->datahi_reg;
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switch (opc & MO_SIZE) {
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case MO_8:
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argreg = tcg_out_arg_reg8(s, argreg, data_reg);
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argreg = tcg_out_arg_reg8(s, argreg, datalo);
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break;
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case MO_16:
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argreg = tcg_out_arg_reg16(s, argreg, data_reg);
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argreg = tcg_out_arg_reg16(s, argreg, datalo);
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break;
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case MO_32:
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default:
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argreg = tcg_out_arg_reg32(s, argreg, data_reg);
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argreg = tcg_out_arg_reg32(s, argreg, datalo);
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break;
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case MO_64:
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argreg = tcg_out_arg_reg64(s, argreg, data_reg, data_reg2);
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argreg = tcg_out_arg_reg64(s, argreg, datalo, datahi);
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break;
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}
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@ -1369,23 +1369,23 @@ static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *lb)
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static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, TCGMemOp opc)
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{
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TCGReg addr_reg, data_reg, data_reg2;
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TCGReg addrlo, datalo, datahi;
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TCGMemOp bswap = opc & MO_BSWAP;
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TCGMemOp s_bits = opc & MO_SIZE;
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#ifdef CONFIG_SOFTMMU
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int mem_index;
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TCGReg addr_reg2, addend;
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TCGReg addrhi, addend;
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uint8_t *label_ptr;
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#endif
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data_reg = *args++;
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data_reg2 = (s_bits == MO_64 ? *args++ : 0);
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addr_reg = *args++;
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datalo = *args++;
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datahi = (s_bits == MO_64 ? *args++ : 0);
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addrlo = *args++;
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#ifdef CONFIG_SOFTMMU
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addr_reg2 = (TARGET_LONG_BITS == 64 ? *args++ : 0);
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addrhi = (TARGET_LONG_BITS == 64 ? *args++ : 0);
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mem_index = *args;
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addend = tcg_out_tlb_read(s, addr_reg, addr_reg2, s_bits, mem_index, 1);
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addend = tcg_out_tlb_read(s, addrlo, addrhi, s_bits, mem_index, 1);
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/* This a conditional BL only to load a pointer within this opcode into LR
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for the slow path. We will not be using the value for a tail call. */
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@ -1394,47 +1394,47 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, TCGMemOp opc)
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switch (opc & MO_SSIZE) {
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case MO_UB:
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tcg_out_ld8_r(s, COND_AL, data_reg, addr_reg, addend);
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tcg_out_ld8_r(s, COND_AL, datalo, addrlo, addend);
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break;
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case MO_SB:
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tcg_out_ld8s_r(s, COND_AL, data_reg, addr_reg, addend);
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tcg_out_ld8s_r(s, COND_AL, datalo, addrlo, addend);
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break;
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case MO_UW:
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tcg_out_ld16u_r(s, COND_AL, data_reg, addr_reg, addend);
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tcg_out_ld16u_r(s, COND_AL, datalo, addrlo, addend);
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if (bswap) {
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tcg_out_bswap16(s, COND_AL, data_reg, data_reg);
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tcg_out_bswap16(s, COND_AL, datalo, datalo);
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}
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break;
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case MO_SW:
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if (bswap) {
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tcg_out_ld16u_r(s, COND_AL, data_reg, addr_reg, addend);
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tcg_out_bswap16s(s, COND_AL, data_reg, data_reg);
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tcg_out_ld16u_r(s, COND_AL, datalo, addrlo, addend);
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tcg_out_bswap16s(s, COND_AL, datalo, datalo);
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} else {
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tcg_out_ld16s_r(s, COND_AL, data_reg, addr_reg, addend);
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tcg_out_ld16s_r(s, COND_AL, datalo, addrlo, addend);
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}
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break;
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case MO_UL:
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default:
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tcg_out_ld32_r(s, COND_AL, data_reg, addr_reg, addend);
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tcg_out_ld32_r(s, COND_AL, datalo, addrlo, addend);
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if (bswap) {
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tcg_out_bswap32(s, COND_AL, data_reg, data_reg);
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tcg_out_bswap32(s, COND_AL, datalo, datalo);
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}
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break;
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case MO_Q:
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{
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/* Be careful not to modify data_reg and data_reg2
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/* Be careful not to modify datalo and datahi
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for the slow path below. */
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TCGReg dl = (bswap ? data_reg2 : data_reg);
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TCGReg dh = (bswap ? data_reg : data_reg2);
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TCGReg dl = (bswap ? datahi : datalo);
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TCGReg dh = (bswap ? datalo : datahi);
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if (use_armv6_instructions && (dl & 1) == 0 && dh == dl + 1) {
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tcg_out_ldrd_r(s, COND_AL, dl, addr_reg, addend);
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tcg_out_ldrd_r(s, COND_AL, dl, addrlo, addend);
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} else if (dl != addend) {
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tcg_out_ld32_rwb(s, COND_AL, dl, addend, addr_reg);
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tcg_out_ld32_rwb(s, COND_AL, dl, addend, addrlo);
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tcg_out_ld32_12(s, COND_AL, dh, addend, 4);
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} else {
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tcg_out_dat_reg(s, COND_AL, ARITH_ADD, TCG_REG_TMP,
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addend, addr_reg, SHIFT_IMM_LSL(0));
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addend, addrlo, SHIFT_IMM_LSL(0));
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tcg_out_ld32_12(s, COND_AL, dl, TCG_REG_TMP, 0);
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tcg_out_ld32_12(s, COND_AL, dh, TCG_REG_TMP, 4);
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}
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@ -1446,7 +1446,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, TCGMemOp opc)
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break;
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}
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add_qemu_ldst_label(s, 1, opc, data_reg, data_reg2, addr_reg, addr_reg2,
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add_qemu_ldst_label(s, 1, opc, datalo, datahi, addrlo, addrhi,
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mem_index, s->code_ptr, label_ptr);
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#else /* !CONFIG_SOFTMMU */
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if (GUEST_BASE) {
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@ -1457,57 +1457,57 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, TCGMemOp opc)
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i = ctz32(offset) & ~1;
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rot = ((32 - i) << 7) & 0xf00;
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tcg_out_dat_imm(s, COND_AL, ARITH_ADD, TCG_REG_TMP, addr_reg,
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tcg_out_dat_imm(s, COND_AL, ARITH_ADD, TCG_REG_TMP, addrlo,
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((offset >> i) & 0xff) | rot);
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addr_reg = TCG_REG_TMP;
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addrlo = TCG_REG_TMP;
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offset &= ~(0xff << i);
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}
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}
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switch (opc & MO_SSIZE) {
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case MO_UB:
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tcg_out_ld8_12(s, COND_AL, data_reg, addr_reg, 0);
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tcg_out_ld8_12(s, COND_AL, datalo, addrlo, 0);
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break;
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case MO_SB:
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tcg_out_ld8s_8(s, COND_AL, data_reg, addr_reg, 0);
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tcg_out_ld8s_8(s, COND_AL, datalo, addrlo, 0);
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break;
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case MO_UW:
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tcg_out_ld16u_8(s, COND_AL, data_reg, addr_reg, 0);
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tcg_out_ld16u_8(s, COND_AL, datalo, addrlo, 0);
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if (bswap) {
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tcg_out_bswap16(s, COND_AL, data_reg, data_reg);
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tcg_out_bswap16(s, COND_AL, datalo, datalo);
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}
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break;
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case MO_SW:
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if (bswap) {
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tcg_out_ld16u_8(s, COND_AL, data_reg, addr_reg, 0);
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tcg_out_bswap16s(s, COND_AL, data_reg, data_reg);
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tcg_out_ld16u_8(s, COND_AL, datalo, addrlo, 0);
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tcg_out_bswap16s(s, COND_AL, datalo, datalo);
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} else {
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tcg_out_ld16s_8(s, COND_AL, data_reg, addr_reg, 0);
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tcg_out_ld16s_8(s, COND_AL, datalo, addrlo, 0);
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}
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break;
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case MO_UL:
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default:
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tcg_out_ld32_12(s, COND_AL, data_reg, addr_reg, 0);
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tcg_out_ld32_12(s, COND_AL, datalo, addrlo, 0);
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if (bswap) {
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tcg_out_bswap32(s, COND_AL, data_reg, data_reg);
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tcg_out_bswap32(s, COND_AL, datalo, datalo);
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}
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break;
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case MO_Q:
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if (use_armv6_instructions && !bswap
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&& (data_reg & 1) == 0 && data_reg2 == data_reg + 1) {
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tcg_out_ldrd_8(s, COND_AL, data_reg, addr_reg, 0);
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&& (datalo & 1) == 0 && datahi == datalo + 1) {
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tcg_out_ldrd_8(s, COND_AL, datalo, addrlo, 0);
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} else if (use_armv6_instructions && bswap
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&& (data_reg2 & 1) == 0 && data_reg == data_reg2 + 1) {
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tcg_out_ldrd_8(s, COND_AL, data_reg2, addr_reg, 0);
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} else if (data_reg == addr_reg) {
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tcg_out_ld32_12(s, COND_AL, data_reg2, addr_reg, bswap ? 0 : 4);
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tcg_out_ld32_12(s, COND_AL, data_reg, addr_reg, bswap ? 4 : 0);
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&& (datahi & 1) == 0 && datalo == datahi + 1) {
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tcg_out_ldrd_8(s, COND_AL, datahi, addrlo, 0);
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} else if (datalo == addrlo) {
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tcg_out_ld32_12(s, COND_AL, datahi, addrlo, bswap ? 0 : 4);
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tcg_out_ld32_12(s, COND_AL, datalo, addrlo, bswap ? 4 : 0);
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} else {
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tcg_out_ld32_12(s, COND_AL, data_reg, addr_reg, bswap ? 4 : 0);
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tcg_out_ld32_12(s, COND_AL, data_reg2, addr_reg, bswap ? 0 : 4);
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tcg_out_ld32_12(s, COND_AL, datalo, addrlo, bswap ? 4 : 0);
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tcg_out_ld32_12(s, COND_AL, datahi, addrlo, bswap ? 0 : 4);
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}
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if (bswap) {
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tcg_out_bswap32(s, COND_AL, data_reg, data_reg);
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tcg_out_bswap32(s, COND_AL, data_reg2, data_reg2);
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tcg_out_bswap32(s, COND_AL, datalo, datalo);
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tcg_out_bswap32(s, COND_AL, datahi, datahi);
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}
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break;
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}
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@ -1516,12 +1516,12 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, TCGMemOp opc)
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static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, TCGMemOp opc)
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{
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TCGReg addr_reg, data_reg, data_reg2;
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TCGReg addrlo, datalo, datahi;
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TCGMemOp bswap = opc & MO_BSWAP;
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TCGMemOp s_bits = opc & MO_SIZE;
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#ifdef CONFIG_SOFTMMU
|
||||
int mem_index;
|
||||
TCGReg addr_reg2, addend;
|
||||
TCGReg addrhi, addend;
|
||||
uint8_t *label_ptr;
|
||||
#endif
|
||||
#ifdef TARGET_WORDS_BIGENDIAN
|
||||
|
@ -1530,48 +1530,48 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, TCGMemOp opc)
|
|||
bswap = 0;
|
||||
#endif
|
||||
|
||||
data_reg = *args++;
|
||||
data_reg2 = (s_bits == MO_64 ? *args++ : 0);
|
||||
addr_reg = *args++;
|
||||
datalo = *args++;
|
||||
datahi = (s_bits == MO_64 ? *args++ : 0);
|
||||
addrlo = *args++;
|
||||
#ifdef CONFIG_SOFTMMU
|
||||
addr_reg2 = (TARGET_LONG_BITS == 64 ? *args++ : 0);
|
||||
addrhi = (TARGET_LONG_BITS == 64 ? *args++ : 0);
|
||||
mem_index = *args;
|
||||
|
||||
addend = tcg_out_tlb_read(s, addr_reg, addr_reg2, s_bits, mem_index, 0);
|
||||
addend = tcg_out_tlb_read(s, addrlo, addrhi, s_bits, mem_index, 0);
|
||||
|
||||
switch (s_bits) {
|
||||
case MO_8:
|
||||
tcg_out_st8_r(s, COND_EQ, data_reg, addr_reg, addend);
|
||||
tcg_out_st8_r(s, COND_EQ, datalo, addrlo, addend);
|
||||
break;
|
||||
case MO_16:
|
||||
if (bswap) {
|
||||
tcg_out_bswap16st(s, COND_EQ, TCG_REG_R0, data_reg);
|
||||
tcg_out_st16_r(s, COND_EQ, TCG_REG_R0, addr_reg, addend);
|
||||
tcg_out_bswap16st(s, COND_EQ, TCG_REG_R0, datalo);
|
||||
tcg_out_st16_r(s, COND_EQ, TCG_REG_R0, addrlo, addend);
|
||||
} else {
|
||||
tcg_out_st16_r(s, COND_EQ, data_reg, addr_reg, addend);
|
||||
tcg_out_st16_r(s, COND_EQ, datalo, addrlo, addend);
|
||||
}
|
||||
break;
|
||||
case MO_32:
|
||||
default:
|
||||
if (bswap) {
|
||||
tcg_out_bswap32(s, COND_EQ, TCG_REG_R0, data_reg);
|
||||
tcg_out_st32_r(s, COND_EQ, TCG_REG_R0, addr_reg, addend);
|
||||
tcg_out_bswap32(s, COND_EQ, TCG_REG_R0, datalo);
|
||||
tcg_out_st32_r(s, COND_EQ, TCG_REG_R0, addrlo, addend);
|
||||
} else {
|
||||
tcg_out_st32_r(s, COND_EQ, data_reg, addr_reg, addend);
|
||||
tcg_out_st32_r(s, COND_EQ, datalo, addrlo, addend);
|
||||
}
|
||||
break;
|
||||
case MO_64:
|
||||
if (bswap) {
|
||||
tcg_out_bswap32(s, COND_EQ, TCG_REG_R0, data_reg2);
|
||||
tcg_out_st32_rwb(s, COND_EQ, TCG_REG_R0, addend, addr_reg);
|
||||
tcg_out_bswap32(s, COND_EQ, TCG_REG_R0, data_reg);
|
||||
tcg_out_bswap32(s, COND_EQ, TCG_REG_R0, datahi);
|
||||
tcg_out_st32_rwb(s, COND_EQ, TCG_REG_R0, addend, addrlo);
|
||||
tcg_out_bswap32(s, COND_EQ, TCG_REG_R0, datalo);
|
||||
tcg_out_st32_12(s, COND_EQ, TCG_REG_R0, addend, 4);
|
||||
} else if (use_armv6_instructions
|
||||
&& (data_reg & 1) == 0 && data_reg2 == data_reg + 1) {
|
||||
tcg_out_strd_r(s, COND_EQ, data_reg, addr_reg, addend);
|
||||
&& (datalo & 1) == 0 && datahi == datalo + 1) {
|
||||
tcg_out_strd_r(s, COND_EQ, datalo, addrlo, addend);
|
||||
} else {
|
||||
tcg_out_st32_rwb(s, COND_EQ, data_reg, addend, addr_reg);
|
||||
tcg_out_st32_12(s, COND_EQ, data_reg2, addend, 4);
|
||||
tcg_out_st32_rwb(s, COND_EQ, datalo, addend, addrlo);
|
||||
tcg_out_st32_12(s, COND_EQ, datahi, addend, 4);
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
@ -1580,7 +1580,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, TCGMemOp opc)
|
|||
label_ptr = s->code_ptr;
|
||||
tcg_out_bl_noaddr(s, COND_NE);
|
||||
|
||||
add_qemu_ldst_label(s, 0, opc, data_reg, data_reg2, addr_reg, addr_reg2,
|
||||
add_qemu_ldst_label(s, 0, opc, datalo, datahi, addrlo, addrhi,
|
||||
mem_index, s->code_ptr, label_ptr);
|
||||
#else /* !CONFIG_SOFTMMU */
|
||||
if (GUEST_BASE) {
|
||||
|
@ -1592,45 +1592,45 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, TCGMemOp opc)
|
|||
i = ctz32(offset) & ~1;
|
||||
rot = ((32 - i) << 7) & 0xf00;
|
||||
|
||||
tcg_out_dat_imm(s, COND_AL, ARITH_ADD, TCG_REG_R1, addr_reg,
|
||||
tcg_out_dat_imm(s, COND_AL, ARITH_ADD, TCG_REG_R1, addrlo,
|
||||
((offset >> i) & 0xff) | rot);
|
||||
addr_reg = TCG_REG_R1;
|
||||
addrlo = TCG_REG_R1;
|
||||
offset &= ~(0xff << i);
|
||||
}
|
||||
}
|
||||
switch (s_bits) {
|
||||
case MO_8:
|
||||
tcg_out_st8_12(s, COND_AL, data_reg, addr_reg, 0);
|
||||
tcg_out_st8_12(s, COND_AL, datalo, addrlo, 0);
|
||||
break;
|
||||
case MO_16:
|
||||
if (bswap) {
|
||||
tcg_out_bswap16st(s, COND_AL, TCG_REG_R0, data_reg);
|
||||
tcg_out_st16_8(s, COND_AL, TCG_REG_R0, addr_reg, 0);
|
||||
tcg_out_bswap16st(s, COND_AL, TCG_REG_R0, datalo);
|
||||
tcg_out_st16_8(s, COND_AL, TCG_REG_R0, addrlo, 0);
|
||||
} else {
|
||||
tcg_out_st16_8(s, COND_AL, data_reg, addr_reg, 0);
|
||||
tcg_out_st16_8(s, COND_AL, datalo, addrlo, 0);
|
||||
}
|
||||
break;
|
||||
case MO_32:
|
||||
default:
|
||||
if (bswap) {
|
||||
tcg_out_bswap32(s, COND_AL, TCG_REG_R0, data_reg);
|
||||
tcg_out_st32_12(s, COND_AL, TCG_REG_R0, addr_reg, 0);
|
||||
tcg_out_bswap32(s, COND_AL, TCG_REG_R0, datalo);
|
||||
tcg_out_st32_12(s, COND_AL, TCG_REG_R0, addrlo, 0);
|
||||
} else {
|
||||
tcg_out_st32_12(s, COND_AL, data_reg, addr_reg, 0);
|
||||
tcg_out_st32_12(s, COND_AL, datalo, addrlo, 0);
|
||||
}
|
||||
break;
|
||||
case MO_64:
|
||||
if (bswap) {
|
||||
tcg_out_bswap32(s, COND_AL, TCG_REG_R0, data_reg2);
|
||||
tcg_out_st32_12(s, COND_AL, TCG_REG_R0, addr_reg, 0);
|
||||
tcg_out_bswap32(s, COND_AL, TCG_REG_R0, data_reg);
|
||||
tcg_out_st32_12(s, COND_AL, TCG_REG_R0, addr_reg, 4);
|
||||
tcg_out_bswap32(s, COND_AL, TCG_REG_R0, datahi);
|
||||
tcg_out_st32_12(s, COND_AL, TCG_REG_R0, addrlo, 0);
|
||||
tcg_out_bswap32(s, COND_AL, TCG_REG_R0, datalo);
|
||||
tcg_out_st32_12(s, COND_AL, TCG_REG_R0, addrlo, 4);
|
||||
} else if (use_armv6_instructions
|
||||
&& (data_reg & 1) == 0 && data_reg2 == data_reg + 1) {
|
||||
tcg_out_strd_8(s, COND_AL, data_reg, addr_reg, 0);
|
||||
&& (datalo & 1) == 0 && datahi == datalo + 1) {
|
||||
tcg_out_strd_8(s, COND_AL, datalo, addrlo, 0);
|
||||
} else {
|
||||
tcg_out_st32_12(s, COND_AL, data_reg, addr_reg, 0);
|
||||
tcg_out_st32_12(s, COND_AL, data_reg2, addr_reg, 4);
|
||||
tcg_out_st32_12(s, COND_AL, datalo, addrlo, 0);
|
||||
tcg_out_st32_12(s, COND_AL, datahi, addrlo, 4);
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
|
Loading…
Reference in a new issue