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tcg: Streamline movcond_i64 using 32-bit arithmetic
Avoiding 64-bit arithmetic (outside of the compare) reduces the generated op count from 15 to 12, and the generated code size on i686 from 105 to 88 bytes. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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1 changed files with 20 additions and 0 deletions
20
tcg/tcg-op.h
20
tcg/tcg-op.h
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@ -2212,6 +2212,25 @@ static inline void tcg_gen_movcond_i64(TCGCond cond, TCGv_i64 ret,
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TCGv_i64 c1, TCGv_i64 c2,
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TCGv_i64 v1, TCGv_i64 v2)
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{
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#if TCG_TARGET_REG_BITS == 32
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TCGv_i32 t0 = tcg_temp_new_i32();
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TCGv_i32 t1 = tcg_temp_new_i32();
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tcg_gen_op6i_i32(INDEX_op_setcond2_i32, t0,
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TCGV_LOW(c1), TCGV_HIGH(c1),
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TCGV_LOW(c2), TCGV_HIGH(c2), cond);
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tcg_gen_neg_i32(t0, t0);
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tcg_gen_and_i32(t1, TCGV_LOW(v1), t0);
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tcg_gen_andc_i32(TCGV_LOW(ret), TCGV_LOW(v2), t0);
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tcg_gen_or_i32(TCGV_LOW(ret), TCGV_LOW(ret), t1);
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tcg_gen_and_i32(t1, TCGV_HIGH(v1), t0);
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tcg_gen_andc_i32(TCGV_HIGH(ret), TCGV_HIGH(v2), t0);
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tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(ret), t1);
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tcg_temp_free_i32(t0);
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tcg_temp_free_i32(t1);
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#else
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if (TCG_TARGET_HAS_movcond_i64) {
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tcg_gen_op6i_i64(INDEX_op_movcond_i64, ret, c1, c2, v1, v2, cond);
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} else {
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@ -2225,6 +2244,7 @@ static inline void tcg_gen_movcond_i64(TCGCond cond, TCGv_i64 ret,
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tcg_temp_free_i64(t0);
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tcg_temp_free_i64(t1);
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}
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#endif
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}
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/***************************************/
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