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pull-loongarch-20221017
-----BEGIN PGP SIGNATURE----- iLMEAAEIAB0WIQS4/x2g0v3LLaCcbCxAov/yOSY+3wUCY0y+zwAKCRBAov/yOSY+ 3xHRA/9+Q6clt4RcaQqBEwhNVSdoEBAjNdTzVP+9wVDsGZ4slFUQ6AKI/9RCdMaY +JzyVTVtuo73QlgZ47/R21GR8phStPjRuad+Gk+1cMAJ5VzF3qjFucUjS9aqKpkE 8KQc6U3Ue5YlIF4Y+fctrzM+ql9gfh6Q2dDeia77cdEKjDj2Aw== =xXE/ -----END PGP SIGNATURE----- Merge tag 'pull-loongarch-20221017' of https://gitlab.com/gaosong/qemu into staging pull-loongarch-20221017 # -----BEGIN PGP SIGNATURE----- # # iLMEAAEIAB0WIQS4/x2g0v3LLaCcbCxAov/yOSY+3wUCY0y+zwAKCRBAov/yOSY+ # 3xHRA/9+Q6clt4RcaQqBEwhNVSdoEBAjNdTzVP+9wVDsGZ4slFUQ6AKI/9RCdMaY # +JzyVTVtuo73QlgZ47/R21GR8phStPjRuad+Gk+1cMAJ5VzF3qjFucUjS9aqKpkE # 8KQc6U3Ue5YlIF4Y+fctrzM+ql9gfh6Q2dDeia77cdEKjDj2Aw== # =xXE/ # -----END PGP SIGNATURE----- # gpg: Signature made Sun 16 Oct 2022 22:32:47 EDT # gpg: using RSA key B8FF1DA0D2FDCB2DA09C6C2C40A2FFF239263EDF # gpg: Can't check signature: No public key * tag 'pull-loongarch-20221017' of https://gitlab.com/gaosong/qemu: hw/intc: Fix LoongArch ipi device emulation linux-user: Fix struct statfs ABI on loongarch64 softfloat: logB(0) should raise divideByZero exception target/loongarch: Fix fnm{sub/add}_{s/d} set wrong flags target/loongarch: bstrins.w src register need EXT_NONE Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
This commit is contained in:
commit
a1bf4f8904
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@ -1436,6 +1436,7 @@ static void partsN(log2)(FloatPartsN *a, float_status *s, const FloatFmt *fmt)
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parts_return_nan(a, s);
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return;
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case float_class_zero:
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float_raise(float_flag_divbyzero, s);
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/* log2(0) = -inf */
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a->cls = float_class_inf;
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a->sign = 1;
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@ -88,7 +88,6 @@ static void ipi_send(uint64_t val)
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cs = qemu_get_cpu(cpuid);
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cpu = LOONGARCH_CPU(cs);
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env = &cpu->env;
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loongarch_cpu_set_irq(cpu, IRQ_IPI, 1);
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address_space_stl(&env->address_space_iocsr, 0x1008,
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data, MEMTXATTRS_UNSPECIFIED, NULL);
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@ -2262,7 +2262,8 @@ struct target_statfs64 {
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};
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#elif (defined(TARGET_PPC64) || defined(TARGET_X86_64) || \
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defined(TARGET_SPARC64) || defined(TARGET_AARCH64) || \
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defined(TARGET_RISCV)) && !defined(TARGET_ABI32)
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defined(TARGET_RISCV) || defined(TARGET_LOONGARCH64)) && \
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!defined(TARGET_ABI32)
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struct target_statfs {
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abi_long f_type;
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abi_long f_bsize;
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@ -27,26 +27,34 @@ static void gen_bytepick_d(TCGv dest, TCGv src1, TCGv src2, target_long sa)
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tcg_gen_extract2_i64(dest, src1, src2, (64 - sa * 8));
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}
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static void gen_bstrins(TCGv dest, TCGv src1,
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unsigned int ls, unsigned int len)
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static bool gen_bstrins(DisasContext *ctx, arg_rr_ms_ls *a,
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DisasExtend dst_ext)
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{
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tcg_gen_deposit_tl(dest, dest, src1, ls, len);
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}
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static bool gen_rr_ms_ls(DisasContext *ctx, arg_rr_ms_ls *a,
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DisasExtend src_ext, DisasExtend dst_ext,
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void (*func)(TCGv, TCGv, unsigned int, unsigned int))
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{
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TCGv dest = gpr_dst(ctx, a->rd, dst_ext);
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TCGv src1 = gpr_src(ctx, a->rj, src_ext);
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TCGv src1 = gpr_src(ctx, a->rd, EXT_NONE);
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TCGv src2 = gpr_src(ctx, a->rj, EXT_NONE);
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TCGv dest = gpr_dst(ctx, a->rd, EXT_NONE);
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if (a->ls > a->ms) {
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return false;
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}
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func(dest, src1, a->ls, a->ms - a->ls + 1);
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tcg_gen_deposit_tl(dest, src1, src2, a->ls, a->ms - a->ls + 1);
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gen_set_gpr(a->rd, dest, dst_ext);
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return true;
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}
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static bool gen_bstrpick(DisasContext *ctx, arg_rr_ms_ls *a,
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DisasExtend dst_ext)
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{
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TCGv dest = gpr_dst(ctx, a->rd, EXT_NONE);
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TCGv src1 = gpr_src(ctx, a->rj, EXT_NONE);
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if (a->ls > a->ms) {
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return false;
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}
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tcg_gen_extract_tl(dest, src1, a->ls, a->ms - a->ls + 1);
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gen_set_gpr(a->rd, dest, dst_ext);
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return true;
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}
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@ -206,7 +214,7 @@ TRANS(maskeqz, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, gen_maskeqz)
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TRANS(masknez, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, gen_masknez)
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TRANS(bytepick_w, gen_rrr_sa, EXT_NONE, EXT_NONE, gen_bytepick_w)
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TRANS(bytepick_d, gen_rrr_sa, EXT_NONE, EXT_NONE, gen_bytepick_d)
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TRANS(bstrins_w, gen_rr_ms_ls, EXT_NONE, EXT_NONE, gen_bstrins)
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TRANS(bstrins_d, gen_rr_ms_ls, EXT_NONE, EXT_NONE, gen_bstrins)
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TRANS(bstrpick_w, gen_rr_ms_ls, EXT_NONE, EXT_SIGN, tcg_gen_extract_tl)
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TRANS(bstrpick_d, gen_rr_ms_ls, EXT_NONE, EXT_NONE, tcg_gen_extract_tl)
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TRANS(bstrins_w, gen_bstrins, EXT_SIGN)
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TRANS(bstrins_d, gen_bstrins, EXT_NONE)
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TRANS(bstrpick_w, gen_bstrpick, EXT_SIGN)
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TRANS(bstrpick_d, gen_bstrpick, EXT_NONE)
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@ -97,9 +97,9 @@ TRANS(fmadd_s, gen_muladd, gen_helper_fmuladd_s, 0)
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TRANS(fmadd_d, gen_muladd, gen_helper_fmuladd_d, 0)
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TRANS(fmsub_s, gen_muladd, gen_helper_fmuladd_s, float_muladd_negate_c)
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TRANS(fmsub_d, gen_muladd, gen_helper_fmuladd_d, float_muladd_negate_c)
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TRANS(fnmadd_s, gen_muladd, gen_helper_fmuladd_s,
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float_muladd_negate_product | float_muladd_negate_c)
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TRANS(fnmadd_d, gen_muladd, gen_helper_fmuladd_d,
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float_muladd_negate_product | float_muladd_negate_c)
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TRANS(fnmsub_s, gen_muladd, gen_helper_fmuladd_s, float_muladd_negate_product)
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TRANS(fnmsub_d, gen_muladd, gen_helper_fmuladd_d, float_muladd_negate_product)
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TRANS(fnmadd_s, gen_muladd, gen_helper_fmuladd_s, float_muladd_negate_result)
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TRANS(fnmadd_d, gen_muladd, gen_helper_fmuladd_d, float_muladd_negate_result)
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TRANS(fnmsub_s, gen_muladd, gen_helper_fmuladd_s,
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float_muladd_negate_c | float_muladd_negate_result)
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TRANS(fnmsub_d, gen_muladd, gen_helper_fmuladd_d,
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float_muladd_negate_c | float_muladd_negate_result)
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