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tcg/tci: Merge mov, not and neg operations
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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parent
fe2b13bb7c
commit
9e9acb7b34
29
tcg/tci.c
29
tcg/tci.c
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@ -387,7 +387,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
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tci_write_reg(regs, t0, tci_compare64(t1, t2, condition));
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break;
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#endif
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case INDEX_op_mov_i32:
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CASE_32_64(mov)
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t0 = *tb_ptr++;
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t1 = tci_read_r(regs, &tb_ptr);
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tci_write_reg(regs, t0, t1);
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@ -649,26 +649,21 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
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tci_write_reg(regs, t0, bswap32(t1));
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break;
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#endif
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#if TCG_TARGET_HAS_not_i32
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case INDEX_op_not_i32:
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#if TCG_TARGET_HAS_not_i32 || TCG_TARGET_HAS_not_i64
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CASE_32_64(not)
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t0 = *tb_ptr++;
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t1 = tci_read_r(regs, &tb_ptr);
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tci_write_reg(regs, t0, ~t1);
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break;
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#endif
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#if TCG_TARGET_HAS_neg_i32
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case INDEX_op_neg_i32:
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#if TCG_TARGET_HAS_neg_i32 || TCG_TARGET_HAS_neg_i64
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CASE_32_64(neg)
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t0 = *tb_ptr++;
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t1 = tci_read_r(regs, &tb_ptr);
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tci_write_reg(regs, t0, -t1);
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break;
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#endif
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#if TCG_TARGET_REG_BITS == 64
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case INDEX_op_mov_i64:
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t0 = *tb_ptr++;
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t1 = tci_read_r(regs, &tb_ptr);
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tci_write_reg(regs, t0, t1);
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break;
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case INDEX_op_tci_movi_i64:
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t0 = *tb_ptr++;
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t1 = tci_read_i64(&tb_ptr);
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@ -802,20 +797,6 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
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tci_write_reg(regs, t0, bswap64(t1));
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break;
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#endif
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#if TCG_TARGET_HAS_not_i64
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case INDEX_op_not_i64:
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t0 = *tb_ptr++;
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t1 = tci_read_r(regs, &tb_ptr);
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tci_write_reg(regs, t0, ~t1);
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break;
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#endif
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#if TCG_TARGET_HAS_neg_i64
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case INDEX_op_neg_i64:
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t0 = *tb_ptr++;
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t1 = tci_read_r(regs, &tb_ptr);
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tci_write_reg(regs, t0, -t1);
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break;
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#endif
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#endif /* TCG_TARGET_REG_BITS == 64 */
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/* QEMU specific operations. */
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