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target/ppc: Add infrastructure for prefixed insns
Signed-off-by: Luis Pires <luis.pires@eldorado.org.br> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20210601193528.2533031-4-matheus.ferst@eldorado.org.br> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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@ -144,6 +144,7 @@ enum {
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POWERPC_EXCP_ALIGN_PROT = 0x04, /* Access cross protection boundary */
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POWERPC_EXCP_ALIGN_BAT = 0x05, /* Access cross a BAT/seg boundary */
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POWERPC_EXCP_ALIGN_CACHE = 0x06, /* Impossible dcbz access */
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POWERPC_EXCP_ALIGN_INSN = 0x07, /* Pref. insn x-ing 64-byte boundary */
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/* Exception subtypes for POWERPC_EXCP_PROGRAM */
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/* FP exceptions */
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POWERPC_EXCP_FP = 0x10,
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18
target/ppc/insn32.decode
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18
target/ppc/insn32.decode
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@ -0,0 +1,18 @@
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#
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# Power ISA decode for 32-bit insns (opcode space 0)
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#
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# Copyright (c) 2021 Instituto de Pesquisas Eldorado (eldorado.org.br)
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#
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# This library is free software; you can redistribute it and/or
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# modify it under the terms of the GNU Lesser General Public
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# License as published by the Free Software Foundation; either
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# version 2.1 of the License, or (at your option) any later version.
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#
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# This library is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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# Lesser General Public License for more details.
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#
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# You should have received a copy of the GNU Lesser General Public
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# License along with this library; if not, see <http://www.gnu.org/licenses/>.
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#
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18
target/ppc/insn64.decode
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18
target/ppc/insn64.decode
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@ -0,0 +1,18 @@
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#
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# Power ISA decode for 64-bit prefixed insns (opcode space 0 and 1)
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#
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# Copyright (c) 2021 Instituto de Pesquisas Eldorado (eldorado.org.br)
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#
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# This library is free software; you can redistribute it and/or
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# modify it under the terms of the GNU Lesser General Public
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# License as published by the Free Software Foundation; either
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# version 2.1 of the License, or (at your option) any later version.
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#
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# This library is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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# Lesser General Public License for more details.
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#
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# You should have received a copy of the GNU Lesser General Public
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# License along with this library; if not, see <http://www.gnu.org/licenses/>.
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#
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@ -20,6 +20,15 @@ ppc_ss.add(when: 'CONFIG_TCG', if_true: files(
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ppc_ss.add(libdecnumber)
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gen = [
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decodetree.process('insn32.decode',
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extra_args: '--static-decode=decode_insn32'),
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decodetree.process('insn64.decode',
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extra_args: ['--static-decode=decode_insn64',
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'--insnwidth=64']),
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]
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ppc_ss.add(gen)
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ppc_ss.add(when: 'CONFIG_KVM', if_true: files('kvm.c'), if_false: files('kvm-stub.c'))
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ppc_ss.add(when: 'CONFIG_USER_ONLY', if_true: files('user_only_helper.c'))
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@ -7690,6 +7690,10 @@ static inline void set_avr64(int regno, TCGv_i64 src, bool high)
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# define REQUIRE_64BIT(CTX) REQUIRE_INSNS_FLAGS(CTX, 64B)
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#endif
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#include "decode-insn32.c.inc"
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#include "decode-insn64.c.inc"
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#include "translate/fixedpoint-impl.c.inc"
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#include "translate/fp-impl.c.inc"
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#include "translate/vmx-impl.c.inc"
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@ -8850,11 +8854,18 @@ static bool ppc_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *cs,
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return true;
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}
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static bool is_prefix_insn(DisasContext *ctx, uint32_t insn)
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{
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REQUIRE_INSNS_FLAGS2(ctx, ISA310);
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return opc1(insn) == 1;
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}
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static void ppc_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs)
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{
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DisasContext *ctx = container_of(dcbase, DisasContext, base);
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PowerPCCPU *cpu = POWERPC_CPU(cs);
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CPUPPCState *env = cs->env_ptr;
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target_ulong pc;
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uint32_t insn;
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bool ok;
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@ -8862,18 +8873,32 @@ static void ppc_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs)
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LOG_DISAS("nip=" TARGET_FMT_lx " super=%d ir=%d\n",
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ctx->base.pc_next, ctx->mem_idx, (int)msr_ir);
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ctx->cia = ctx->base.pc_next;
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insn = translator_ldl_swap(env, ctx->base.pc_next, need_byteswap(ctx));
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ctx->base.pc_next += 4;
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ctx->cia = pc = ctx->base.pc_next;
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insn = translator_ldl_swap(env, pc, need_byteswap(ctx));
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ctx->base.pc_next = pc += 4;
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ok = decode_legacy(cpu, ctx, insn);
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if (!is_prefix_insn(ctx, insn)) {
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ok = (decode_insn32(ctx, insn) ||
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decode_legacy(cpu, ctx, insn));
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} else if ((pc & 63) == 0) {
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/*
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* Power v3.1, section 1.9 Exceptions:
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* attempt to execute a prefixed instruction that crosses a
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* 64-byte address boundary (system alignment error).
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*/
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gen_exception_err(ctx, POWERPC_EXCP_ALIGN, POWERPC_EXCP_ALIGN_INSN);
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ok = true;
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} else {
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uint32_t insn2 = translator_ldl_swap(env, pc, need_byteswap(ctx));
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ctx->base.pc_next = pc += 4;
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ok = decode_insn64(ctx, deposit64(insn2, 32, 32, insn));
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}
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if (!ok) {
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gen_invalid(ctx);
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}
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/* End the TB when crossing a page boundary. */
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if (ctx->base.is_jmp == DISAS_NEXT &&
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!(ctx->base.pc_next & ~TARGET_PAGE_MASK)) {
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if (ctx->base.is_jmp == DISAS_NEXT && !(pc & ~TARGET_PAGE_MASK)) {
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ctx->base.is_jmp = DISAS_TOO_MANY;
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}
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18
target/ppc/translate/fixedpoint-impl.c.inc
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18
target/ppc/translate/fixedpoint-impl.c.inc
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@ -0,0 +1,18 @@
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/*
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* Power ISA decode for Fixed-Point Facility instructions
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*
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* Copyright (c) 2021 Instituto de Pesquisas Eldorado (eldorado.org.br)
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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