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target/riscv: introduce floating-point rounding mode enum
Signed-off-by: Frank Chang <frank.chang@sifive.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211210075704.23951-61-frank.chang@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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@ -55,23 +55,23 @@ void helper_set_rounding_mode(CPURISCVState *env, uint32_t rm)
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{
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int softrm;
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if (rm == 7) {
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if (rm == RISCV_FRM_DYN) {
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rm = env->frm;
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}
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switch (rm) {
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case 0:
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case RISCV_FRM_RNE:
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softrm = float_round_nearest_even;
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break;
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case 1:
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case RISCV_FRM_RTZ:
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softrm = float_round_to_zero;
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break;
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case 2:
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case RISCV_FRM_RDN:
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softrm = float_round_down;
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break;
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case 3:
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case RISCV_FRM_RUP:
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softrm = float_round_up;
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break;
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case 4:
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case RISCV_FRM_RMM:
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softrm = float_round_ties_away;
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break;
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default:
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@ -2088,7 +2088,7 @@ static bool trans_##NAME(DisasContext *s, arg_rmrr *a) \
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gen_helper_##NAME##_d, \
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}; \
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TCGLabel *over = gen_new_label(); \
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gen_set_rm(s, 7); \
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gen_set_rm(s, RISCV_FRM_DYN); \
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tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_vl, 0, over); \
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\
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data = FIELD_DP32(data, VDATA, VM, a->vm); \
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@ -2167,7 +2167,7 @@ static bool trans_##NAME(DisasContext *s, arg_rmrr *a) \
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gen_helper_##NAME##_w, \
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gen_helper_##NAME##_d, \
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}; \
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gen_set_rm(s, 7); \
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gen_set_rm(s, RISCV_FRM_DYN); \
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data = FIELD_DP32(data, VDATA, VM, a->vm); \
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data = FIELD_DP32(data, VDATA, LMUL, s->lmul); \
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return opfvf_trans(a->rd, a->rs1, a->rs2, data, \
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@ -2199,7 +2199,7 @@ static bool trans_##NAME(DisasContext *s, arg_rmrr *a) \
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gen_helper_##NAME##_h, gen_helper_##NAME##_w, \
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}; \
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TCGLabel *over = gen_new_label(); \
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gen_set_rm(s, 7); \
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gen_set_rm(s, RISCV_FRM_DYN); \
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tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_vl, 0, over); \
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\
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data = FIELD_DP32(data, VDATA, VM, a->vm); \
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@ -2236,7 +2236,7 @@ static bool trans_##NAME(DisasContext *s, arg_rmrr *a) \
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static gen_helper_opfvf *const fns[2] = { \
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gen_helper_##NAME##_h, gen_helper_##NAME##_w, \
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}; \
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gen_set_rm(s, 7); \
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gen_set_rm(s, RISCV_FRM_DYN); \
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data = FIELD_DP32(data, VDATA, VM, a->vm); \
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data = FIELD_DP32(data, VDATA, LMUL, s->lmul); \
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return opfvf_trans(a->rd, a->rs1, a->rs2, data, \
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@ -2266,7 +2266,7 @@ static bool trans_##NAME(DisasContext *s, arg_rmrr *a) \
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gen_helper_##NAME##_h, gen_helper_##NAME##_w, \
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}; \
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TCGLabel *over = gen_new_label(); \
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gen_set_rm(s, 7); \
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gen_set_rm(s, RISCV_FRM_DYN); \
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tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_vl, 0, over); \
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\
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data = FIELD_DP32(data, VDATA, VM, a->vm); \
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@ -2303,7 +2303,7 @@ static bool trans_##NAME(DisasContext *s, arg_rmrr *a) \
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static gen_helper_opfvf *const fns[2] = { \
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gen_helper_##NAME##_h, gen_helper_##NAME##_w, \
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}; \
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gen_set_rm(s, 7); \
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gen_set_rm(s, RISCV_FRM_DYN); \
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data = FIELD_DP32(data, VDATA, VM, a->vm); \
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data = FIELD_DP32(data, VDATA, LMUL, s->lmul); \
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return opfvf_trans(a->rd, a->rs1, a->rs2, data, \
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@ -2380,7 +2380,7 @@ static bool trans_##NAME(DisasContext *s, arg_rmr *a) \
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gen_helper_##NAME##_d, \
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}; \
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TCGLabel *over = gen_new_label(); \
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gen_set_rm(s, 7); \
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gen_set_rm(s, RISCV_FRM_DYN); \
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tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_vl, 0, over); \
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\
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data = FIELD_DP32(data, VDATA, VM, a->vm); \
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@ -2526,7 +2526,7 @@ static bool trans_##NAME(DisasContext *s, arg_rmr *a) \
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gen_helper_##NAME##_w, \
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}; \
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TCGLabel *over = gen_new_label(); \
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gen_set_rm(s, 7); \
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gen_set_rm(s, RISCV_FRM_DYN); \
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tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_vl, 0, over); \
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\
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data = FIELD_DP32(data, VDATA, VM, a->vm); \
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@ -2574,7 +2574,7 @@ static bool trans_##NAME(DisasContext *s, arg_rmr *a) \
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gen_helper_##NAME##_w, \
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}; \
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TCGLabel *over = gen_new_label(); \
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gen_set_rm(s, 7); \
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gen_set_rm(s, RISCV_FRM_DYN); \
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tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_vl, 0, over); \
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\
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data = FIELD_DP32(data, VDATA, VM, a->vm); \
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@ -36,6 +36,15 @@ target_ulong fclass_d(uint64_t frs1);
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extern const VMStateDescription vmstate_riscv_cpu;
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#endif
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enum {
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RISCV_FRM_RNE = 0, /* Round to Nearest, ties to Even */
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RISCV_FRM_RTZ = 1, /* Round towards Zero */
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RISCV_FRM_RDN = 2, /* Round Down */
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RISCV_FRM_RUP = 3, /* Round Up */
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RISCV_FRM_RMM = 4, /* Round to Nearest, ties to Max Magnitude */
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RISCV_FRM_DYN = 7, /* Dynamic rounding mode */
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};
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static inline uint64_t nanbox_s(float32 f)
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{
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return f | MAKE_64BIT_MASK(32, 32);
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