system/qemu
system/qemu
1
0
Fork 0
mirror of https://gitlab.com/qemu-project/qemu synced 2024-07-23 11:24:38 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

acpi: pc: isa bridge: use AcpiDevAmlIf interface to build ISA device descriptors

Browse source 
replaces ad-hoc build_isa_devices_aml() with generic AcpiDevAmlIf
way to build bridge AML including all devices that are attached to
its ISA bus.

Later when PCI is converted to AcpiDevAmlIf, build_piix4_isa_bridge()
will also be dropped since PCI parts itself will take care of
building device prologue/epilogue AML for each enumerated PCI
device.

Expected AML change is contextual, where ISA devices are moved
from separately declared _SB.PCI0.ISA scope , directly under
Device(ISA) node.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Message-Id: <20220608135340.3304695-20-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
This commit is contained in:
Igor Mammedov 2022-06-08 09:53:24 -04:00 committed by Michael S. Tsirkin
parent 6a4b286ced
commit 92ea7fb3fe
2 changed files with 28 additions and 5 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

16
hw/i386/acpi-build.c
View file

@ -1280,15 +1280,22 @@ static void build_piix4_isa_bridge(Aml *table)
{
Aml *dev;
Aml *scope;
Object *obj;
bool ambiguous;
/*
* temporarily fish out isa bridge, build_piix4_isa_bridge() will be dropped
* once PCI is converted to AcpiDevAmlIf and would be ble to generate
* AML for bridge itself
*/
obj = object_resolve_path_type("", TYPE_PIIX3_PCI_DEVICE, &ambiguous);
assert(obj && !ambiguous);
scope = aml_scope("_SB.PCI0");
dev = aml_device("ISA");
aml_append(dev, aml_name_decl("_ADR", aml_int(0x00010000)));
/* PIIX PCI to ISA irq remapping */
aml_append(dev, aml_operation_region("P40C", AML_PCI_CONFIG,
aml_int(0x60), 0x04));
call_dev_aml_func(DEVICE(obj), dev);
aml_append(scope, dev);
aml_append(table, scope);
}
@ -1476,7 +1483,6 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
build_hpet_aml(dsdt);
}
build_piix4_isa_bridge(dsdt);
build_isa_devices_aml(dsdt);
if (pm->pcihp_bridge_en || pm->pcihp_root_en) {
build_x86_acpi_pci_hotplug(dsdt, pm->pcihp_io_base);
}

17
hw/isa/piix3.c
View file

@ -32,6 +32,7 @@
#include "sysemu/reset.h"
#include "sysemu/runstate.h"
#include "migration/vmstate.h"
#include "hw/acpi/acpi_aml_interface.h"
#define XEN_PIIX_NUM_PIRQS 128ULL
@ -286,10 +287,24 @@ static void piix3_realize(PCIDevice *dev, Error **errp)
qemu_register_reset(piix3_reset, d);
}
static void build_pci_isa_aml(AcpiDevAmlIf *adev, Aml *scope)
{
BusChild *kid;
BusState *bus = qdev_get_child_bus(DEVICE(adev), "isa.0");
/* PIIX PCI to ISA irq remapping */
aml_append(scope, aml_operation_region("P40C", AML_PCI_CONFIG,
aml_int(0x60), 0x04));
QTAILQ_FOREACH(kid, &bus->children, sibling) {
call_dev_aml_func(DEVICE(kid->child), scope);
}
}
static void pci_piix3_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
AcpiDevAmlIfClass *adevc = ACPI_DEV_AML_IF_CLASS(klass);
dc->desc = "ISA bridge";
dc->vmsd = &vmstate_piix3;
@ -304,6 +319,7 @@ static void pci_piix3_class_init(ObjectClass *klass, void *data)
* pc_piix.c's pc_init1()
*/
dc->user_creatable = false;
adevc->build_dev_aml = build_pci_isa_aml;
}
static const TypeInfo piix3_pci_type_info = {
@ -314,6 +330,7 @@ static const TypeInfo piix3_pci_type_info = {
.class_init = pci_piix3_class_init,
.interfaces = (InterfaceInfo[]) {
{ INTERFACE_CONVENTIONAL_PCI_DEVICE },
{ TYPE_ACPI_DEV_AML_IF },
{ },
},
};