From 8e2e95ef04a8d40d59d1d735e3ebd48324c27417 Mon Sep 17 00:00:00 2001 From: "Michael S. Tsirkin" Date: Thu, 11 Jul 2019 15:24:18 -0400 Subject: [PATCH] xio3130_downstream: typo fix slt ctl/status are passed in incorrect order. Fix this up. Signed-off-by: Michael S. Tsirkin Reported-by: Peter Maydell Reviewed-by: Marcel Apfelbaum --- hw/pci-bridge/xio3130_downstream.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/pci-bridge/xio3130_downstream.c b/hw/pci-bridge/xio3130_downstream.c index 899b0fd6c9..182e164f74 100644 --- a/hw/pci-bridge/xio3130_downstream.c +++ b/hw/pci-bridge/xio3130_downstream.c @@ -43,7 +43,7 @@ static void xio3130_downstream_write_config(PCIDevice *d, uint32_t address, { uint16_t slt_ctl, slt_sta; - pcie_cap_slot_get(d, &slt_sta, &slt_ctl); + pcie_cap_slot_get(d, &slt_ctl, &slt_sta); pci_bridge_write_config(d, address, val, len); pcie_cap_flr_write_config(d, address, val, len); pcie_cap_slot_write_config(d, slt_ctl, slt_sta, address, val, len);