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target-ppc: Add xsiexpqp instruction

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xsiexpqp: VSX Scalar Insert Exponent Quad Precision

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
Nikunj A Dadhania 2017-01-10 14:20:36 +05:30 committed by David Gibson
parent 1b8d663d62
commit 8a9472ec38
2 changed files with 23 additions and 0 deletions
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22
target/ppc/translate/vsx-impl.inc.c
View file

@ -1263,6 +1263,28 @@ static void gen_xsiexpdp(DisasContext *ctx)
tcg_temp_free_i64(t0);
}
static void gen_xsiexpqp(DisasContext *ctx)
{
TCGv_i64 xth = cpu_vsrh(rD(ctx->opcode) + 32);
TCGv_i64 xtl = cpu_vsrl(rD(ctx->opcode) + 32);
TCGv_i64 xah = cpu_vsrh(rA(ctx->opcode) + 32);
TCGv_i64 xal = cpu_vsrl(rA(ctx->opcode) + 32);
TCGv_i64 xbh = cpu_vsrh(rB(ctx->opcode) + 32);
TCGv_i64 t0;
if (unlikely(!ctx->vsx_enabled)) {
gen_exception(ctx, POWERPC_EXCP_VSXU);
return;
}
t0 = tcg_temp_new_i64();
tcg_gen_andi_i64(xth, xah, 0x8000FFFFFFFFFFFF);
tcg_gen_andi_i64(t0, xbh, 0x7FFF);
tcg_gen_shli_i64(t0, t0, 48);
tcg_gen_or_i64(xth, xth, t0);
tcg_gen_mov_i64(xtl, xal);
tcg_temp_free_i64(t0);
}
static void gen_xsxsigdp(DisasContext *ctx)
{
TCGv rt = cpu_gpr[rD(ctx->opcode)];

1
target/ppc/translate/vsx-ops.inc.c
View file

@ -121,6 +121,7 @@ GEN_VSX_XFORM_300_EO(xsxexpqp, 0x04, 0x19, 0x02, 0x00000001),
GEN_XX2FORM_EO(xsxsigdp, 0x16, 0x15, 0x01, PPC2_ISA300),
GEN_VSX_XFORM_300_EO(xsxsigqp, 0x04, 0x19, 0x12, 0x00000001),
GEN_HANDLER_E(xsiexpdp, 0x3C, 0x16, 0x1C, 0, PPC_NONE, PPC2_ISA300),
GEN_VSX_XFORM_300(xsiexpqp, 0x4, 0x1B, 0x00000001),
#endif
GEN_XX2FORM(xvabsdp, 0x12, 0x1D, PPC2_VSX),